LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 241

• Manufacturer Part Number: LM3S3739
• Description: Lm3s3739 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

10
10.1
June 02, 2008
General-Purpose Input/Outputs (GPIOs)
The GPIO module is composed of eight physical GPIO blocks, each corresponding to an individual
GPIO port (Port A, Port B, Port C, Port D, Port E, Port F, Port G, and Port H). The GPIO module
supports 14-61 programmable input/output pins, depending on the peripherals being used.
The GPIO module has the following features:
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Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block(see Figure
10-1 on page 242 and Figure 10-2 on page 243). The LM3S3739 microcontroller contains eight ports
and thus eight of these physical GPIO blocks.
Two means of port access: either high speed (for single-cyle writes), or legacy for
backwards-compatibility with existing code
Programmable control for GPIO interrupts
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5-V-tolerant input/outputs
Bit masking in both read and write operations through address lines
Pins configured as digital inputs are Schmitt-triggered.
Programmable control for GPIO pad configuration:
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Interrupt generation masking
Edge-triggered on rising, falling, or both
Level-sensitive on High or Low values
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be configured
with an 18-mA pad drive for high-current applications
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
All GPIO pins are tri-stated by default (GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0,
and GPIOPUR=0), with the exception of the four JTAG/SWD pins (PC[3:0]). The
JTAG/SWD pins default to their JTAG/SWD functionality (GPIOAFSEL=1, GPIODEN=1
and GPIOPUR=1). A Power-On-Reset (POR) or asserting RST puts both groups of pins
back to their default state.
Preliminary
LM3S3739 Microcontroller
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