LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 353

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LM3S3739

Manufacturer Part Number
LM3S3739
Description
Lm3s3739 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
ADC Active Sample Sequencer (ADCACTSS)
Base 0x4003.8000
Offset 0x000
Type R/W, reset 0x0000.0000
June 02, 2008
Bit/Field
31:4
RO
RO
3
2
1
0
31
15
0
0
RO
RO
Register 1: ADC Active Sample Sequencer (ADCACTSS), offset 0x000
This register controls the activation of the Sample Sequencers. Each Sample Sequencer can be
enabled/disabled independently.
30
14
0
0
RO
RO
29
13
reserved
0
0
ASEN3
ASEN2
ASEN1
ASEN0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
ADC SS3 Enable
Specifies whether Sample Sequencer 3 is enabled. If set, the sample
sequence logic for Sequencer 3 is active. Otherwise, the Sequencer is
inactive.
ADC SS2 Enable
Specifies whether Sample Sequencer 2 is enabled. If set, the sample
sequence logic for Sequencer 2 is active. Otherwise, the Sequencer is
inactive.
ADC SS1 Enable
Specifies whether Sample Sequencer 1 is enabled. If set, the sample
sequence logic for Sequencer 1 is active. Otherwise, the Sequencer is
inactive.
ADC SS0 Enable
Specifies whether Sample Sequencer 0 is enabled. If set, the sample
sequence logic for Sequencer 0 is active. Otherwise, the Sequencer is
inactive.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
ASEN3
R/W
RO
19
0
3
0
LM3S3739 Microcontroller
ASEN2
R/W
RO
18
0
2
0
ASEN1
R/W
RO
17
0
1
0
ASEN0
R/W
RO
16
0
0
0
353

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