LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 201
LM3S5652
Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5652.pdf
(703 pages)
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9.5
June 02, 2008
0xFEC
Offset
0x02C
0x03C
0x04C
0xFD0
0xFE0
0xFE4
0xFE8
0xFFC
0x028
0x030
0x034
0x038
0xFF0
0xFF4
0xFF8
Name
DMAENASET
DMAENACLR
DMAALTSET
DMAALTCLR
DMAPRIOSET
DMAPRIOCLR
DMAERRCLR
DMAPeriphID4
DMAPeriphID0
DMAPeriphID1
DMAPeriphID2
DMAPeriphID3
DMAPCellID0
DMAPCellID1
DMAPCellID2
DMAPCellID3
μDMA Channel Control Structure
The μDMA Channel Control Structure holds the DMA transfer settings for a DMA channel. Each
channel has two control structures, which are located in a table in system memory. Refer to “Channel
Configuration” on page 183 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. There is a primary and
alternate structure for each channel. The primary control structures are located at offsets 0x0, 0x10,
0x20 and so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and
so on.
Type
R/W
R/W
R/W
R/W
WO
WO
WO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0x0000.000D
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0004
0x0000.0030
0x0000.00B2
0x0000.000B
0x0000.0000
0x0000.00F0
0x0000.0005
0x0000.00B1
Reset
-
-
-
Preliminary
Description
DMA Channel Enable Set
DMA Channel Enable Clear
DMA Channel Primary Alternate Set
DMA Channel Primary Alternate Clear
DMA Channel Priority Set
DMA Channel Priority Clear
DMA Bus Error Clear
DMA Peripheral Identification 4
DMA Peripheral Identification 0
DMA Peripheral Identification 1
DMA Peripheral Identification 2
DMA Peripheral Identification 3
DMA PrimeCell Identification 0
DMA PrimeCell Identification 1
DMA PrimeCell Identification 2
DMA PrimeCell Identification 3
LM3S5652 Microcontroller
page
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