LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 569
LM3S5652
Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5652.pdf
(703 pages)
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Reset
Type
Offset 0x064
Type R/W, reset 0x0000
June 02, 2008
Host
Device
Bit/Field
15:13
12:0
RO
15
0
reserved
RO
Register 19: USB Transmit FIFO Start Address (USBTXFIFOADD), offset 0x064
Register 20: USB Receive FIFO Start Address (USBRXFIFOADD), offset 0x066
USBTXFIFOADD is a 16-bit register that controls the start address of the selected transmit endpoint
FIFO. USBRXFIFOADD is a 14-bit register that controls the start address of the selected receive
endpoint FIFO.
USB Transmit FIFO Start Address (USBTXFIFOADD)
Base 0x4005.0000
14
0
RO
13
reserved
0
ADDR
Name
R/W
12
0
R/W
11
0
Type
R/W
RO
R/W
10
0
R/W
Reset
0x00
0x00
9
0
Preliminary
R/W
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Transmit/Receive Start Address
Start address of the endpoint FIFO in units of 8 bytes.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA-0x1FFF
R/W
7
0
ADDR
R/W
6
0
Start Address
0
8
16
32
64
128
256
512
1024
2048
Reserved
R/W
5
0
R/W
4
0
R/W
3
0
LM3S5652 Microcontroller
R/W
2
0
R/W
1
0
R/W
0
0
569
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