LM3S818 Luminary Micro, Inc, LM3S818 Datasheet - Page 13

• Manufacturer Part Number: LM3S818
• Description: Lm3s818 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

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Analog-to-Digital Converter (ADC).............................................................................................. 199
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February 6, 2007
Watchdog Control (WDTCTL), offset 0x008............................................................................ 181
Watchdog Interrupt Clear (WDTICR), offset 0x00C ................................................................ 182
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 ....................................................... 183
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014.................................................. 184
Watchdog Lock (WDTLOCK), offset 0xC00 ............................................................................ 185
Watchdog Test (WDTTEST), offset 0x418 .............................................................................. 186
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0..................................... 187
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4..................................... 188
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8..................................... 189
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC .................................... 190
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ..................................... 191
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ..................................... 192
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ..................................... 193
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC .................................... 194
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0........................................ 195
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4........................................ 196
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8........................................ 197
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC ...................................... 198
ADC Active Sample Sequencer (ADCACTSS), offset 0x000 .................................................. 205
ADC Raw Interrupt Status (ADCRIS), offset 0x004................................................................. 206
ADC Interrupt Mask (ADCIM), offset 0x008 ............................................................................ 207
ADC Interrupt Status and Clear (ADCISC), offset 0x00C........................................................ 208
ADC Overflow Status (ADCOSTAT), offset 0x010 .................................................................. 209
ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ...................................................... 210
ADC Underflow Status (ADCUSTAT), offset 0x018 ................................................................ 211
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020.................................................. 212
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ..................................... 213
ADC Sample Averaging Control (ADCSAC), offset 0x030 ...................................................... 214
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040.................. 215
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044............................................. 217
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048.................................... 219
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C................................ 220
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060.................. 221
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064............................................. 222
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068.................................... 222
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C................................ 222
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080.................. 223
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084............................................. 224
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088.................................... 224
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C................................ 224
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ................. 225
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ............................................ 226
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ................................... 226
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................... 226
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ............................................................ 227
Preliminary
LM3S818 Data Sheet
13