FAN7384 Fairchild Semiconductor, FAN7384 Datasheet
FAN7384
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FAN7384 Summary of contents
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... These devices passed wave soldering test by JESD22A-111. © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 Description The FAN7384 is a monolithic half-bridge gate-drive IC designed for high voltage, high speed driving MOSFETs and IGBTs operating up to +600V. Swing to -9.8V for Fairchild’s high-voltage process and common-mode ...
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... LIN 3-Phase VU Motor UL Controller CSC PULLUP PHA PHB FAULT SHUTDOWN DC Motor Controller © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0 HIN V S LIN CSC GND GND V SL Figure 1. 3-Phase Motor Drive Application ...
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... Internal Block Diagram SCHMITT LIN 1 TRIGGER INPUT HIN 3 SHOOT-THROUGH PREVENTION SD 2 CONTROL LOGIC CSC 6 0.5V V _UVLO DD GND 7 © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 HS(ON/OFF) NOISE CANCELLER V _UVLO DD GND/V LS(ON/OFF) LEVEL SHIFTER ONE-SHOT ONE-SHOT TRIGGER TRIGGER Figure 3. Functional Block Diagram 3 14 UVLO ...
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... CSC 7 GND © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 LIN HIN CSC 6 9 GND 7 8 FAN7384 Rev.00 Figure 4. Pin Configuration (Top View) Description Logic Input for low-side gate driver ...
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... DD V High-side output voltage HO V Low-side output voltage LO V Logic input voltage (HIN, LIN, SD Fault output voltage FO T Ambient temperature A © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 =25°C, unless otherwise specified. A Parameter S B Parameter Condition 5 Min. Max. Unit V - ...
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... Logic input hysteresis voltage INHYS I Logic "1" input bias current IN+ I Logic "0" input bias current IN- © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 and GND and are applicable to the respective outputs HO and LO. S Condition V = LIN f =20kHz, rms value ...
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... Time from CSC triggering to low-side t CSCLO (5) gate output t Shutdown to FO propagation delay SDFO t Shutdown to HIGH/LOW-side gate off SDOFF Note: 5. These parameters guaranteed by design. © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 (Continued) is applicable to HO and LO. S Condition V =1V, R CSCIN CSCIN V =15V DD Voltage on CSC pin up to -12V, (5) Time< ...
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... Figure 5. V UVLO (+) vs. Temperature DD 1.0 0.8 0.6 0.4 0.2 0.0 -40 - Temperature [°C] Figure 7. V UVLO Hysteresis vs. Temperature DD 12.5 12.0 11.5 11.0 10.5 10.0 9.5 -40 - Temperature [°C] Figure 9. V UVLO (-) vs. Temperature BS © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 13.0 12.5 12.0 11.5 11.0 10.5 10 100 120 -40 -20 Figure 6. V 13.0 12.5 12.0 11.5 11.0 10.5 10 100 120 -40 -20 Figure 8. V 1.0 0.8 0.6 0.4 0.2 0.0 ...
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... Temperature [°C] Figure 13. V Operating Current vs. Temperature -40 - Temperature [°C] Figure 15. Logic Input Current vs. Temperature © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 (Continued) 100 100 120 -40 Figure 12. V 1000 800 600 400 200 ...
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... Figure 19. Turn-off Falling Time vs. Temperature 300 250 200 150 100 50 0 -40 - Temperature [°C] Figure 21. Turn-off Delay Time vs. Temperature © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 (Continued) 120 100 100 120 -40 Figure 18. Turn-on Rising Time vs. Temperature 300 ...
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... Temperature [°C] Figure 25. SD Positive Threshold vs. Temperature 0.60 0.55 0.50 0.45 0.40 -40 - Temperature [°C] Figure 27. V vs. Temperature CSCREF © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 (Continued) 1.0 0.8 0.6 0.4 0.2 0 100 120 -40 Figure 24. Logic Input Hysteresis vs. Temperature 3.0 2.5 2.0 1.5 1.0 0.5 0 100 120 -40 Figure 26. SD Negative Threshold vs. Temperature 2 ...
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... Figure 29. Fault Output High Voltage vs. Temperature - -10 -11 -12 -13 -40 - Temperature [°C] Figure 31. Allowable Negative V Propagation to High Side vs. Temperature © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 (Continued) 1.0 0.8 0.6 0.4 0.2 0 100 120 -40 Figure 30. Fault Output Low Voltage vs. Temperature 200 160 120 80 ...
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... Switching Time Definitions The overall switching timing waveforms definition of FAN7384 as shown Figure 33. LIN SD Low-Side Output Disable UVLO UVFLT 0.5V V CSC t CSCFO Soft-Off CSCLO Operating Under-Voltage Detection Point © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 Shutdown Disable Skip Shutdown Shutdown ...
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... CSCFO LO t FAN7384 Rev.01 1 Figure 34. Waveforms for Under-Voltage Lockout 1.2 Shoot-Through Prevention Function The FAN7384 has a shoot-through prevention circuitry that monitors the high- and low-side inputs. It can be designed to prevent outputs of high- and low-side turning on at same time, as shown Figure 35 and 36. HIN/LIN LIN/HIN HO/LO ...
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... S tance and resistance. © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 2.2 Gate-Drive Loop Current loops behave like antennae, able to receive and transmit noise. To reduce the noise coupling/emission and improve the power switch turn-on and off perfor- mance, gate-drive loops must be reduced as much as possible ...
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... Package Dimensions 14-SOP Dimensions are in millimeters unless otherwise noted 0.60 ±0.20 ±0.008 0.024 © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 #14 #8 6.00 ±0.30 ±0.012 0.236 3.95 ±0.20 ±0.008 0.156 5.72 0.225 Figure 38. 14-Lead Small Outline Package (SOP) 16 0.05 MIN 0.002 1.55 ±0.10 0.061 ± ...
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... Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production © 2006 Fairchild Semiconductor Corporation FAN7384 Rev. 1.0.4 PowerTrench HiSeC Programmable Active Droop i-Lo ® QFET ImpliedDisconnect QS IntelliMAX QT Optoelectronics ISOPLANAR Quiet Series ...