AN2502 Freescale Semiconductor / Motorola, AN2502 Datasheet - Page 27

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AN2502

Manufacturer Part Number
AN2502
Description
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Again:
;**********************************************************************
;* This Subroutine configures the two channels:
;* RXTX_config:
;* -> Stop and reset timer.
;* -> Input capture on falling edges with interrupts enabled, so that *
;* we can detect the start bit.
;* -> Disable channel and set initial value of that pin
;* (IDLE STATE)
;* -> Set transmitter empty flag, to be prepared for first
;* transmission
;* -> Port configuration
;* -> Enable interrupts
;* -> Run timer
;**********************************************************************
RXTX_config:
;**********************************************************************
;* GetByte subroutine is a friendly usage of the SCI Reception
;* features, which provides Flags check and storage of the received
;* byte in the accumulator. The User would modify this subroutine if
;* the received byte needs to be stored in another register or memory *
;* location.
;**********************************************************************
GetByte:
MOTOROLA
JSR
JSR
BRA
LDA
STA
MOV
MOV
MOV
BSET
BSET
BCLR
CLI
BCLR
RTS
BRCLR
LDA
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
GetByte
PutByte
Again
#$30
TSC
#$48,TSC0 ; IC, Falling edge, with interrupts
#$00,TSC1 ; OC, output preset HIGH
#$10,rSCSR
TPIN,PTD
TPIN,DDRD
RPIN,DDRD
TSTOP,TSC ; enable timer counter
SCRF,rSCSR,*
rSCRDR
Freescale Semiconductor, Inc.
For More Information On This Product,
; Wait for a byte reception and store
; the received data in the accumulator
; Store the accumulator content to the
; transmission register and wait for
; the transmission to be completed
; stop and reset timer
; Set Tx Empty Flag
; Set pin for Idle State
; Enable all interrupts
; 1........ [3 CYCLES of instruction
;
; Wait for byte to be received. This
; flag is set when the received byte is
; moved from the reception shift
; register to the reception data
; register.
; Store received byte in the accumulator
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prior to RX interrupt]
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AN2502/D
Software
27

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