AN2502 Freescale Semiconductor / Motorola, AN2502 Datasheet - Page 14

• Manufacturer Part Number: AN2502
• Description: Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
• Manufacturer: Freescale Semiconductor / Motorola

AN2502/D
14
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
In enhanced mode software SCI, one or two more output compare interrupts
are performed to check whether the stop bits are at a proper level. Depending
on the
either one or two output compares. If a low level is detected in the reception of
the stop bits, a framing error is set in the
As soon as the last stop bit is received, the receiver full bit (SCRF) is checked
to move the received data from the receiver shift register to the receiver data
register. If the
received has not been read, an overrun error is set in the
received data is moved to the receiver data register.
If the reception completed subroutine is enabled
is able to place code for executing after data is received. The following code
listing shows the name of this subroutine for end of reception:
**********************************************************************
* Program Goes here after a Reception if RIEN = 1 in the rSCCR
**********************************************************************
SCIRXFULL:
; ENTER YOUR SCIRXFULL CODE HERE
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For More Information On This Product,
SB
bit in the configuration register rSCCR, the reception process adds
RTI
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SCRF
LAST DATA BIT
OR PARITY BIT
flag is set, which indicates that a valid data previously
Figure 24. Stop Bits Reception
SB
1
0
Table 4. Stop Bits
STOP BIT
FIRST
AFTER RECEPTION OF THE LAST STOP BIT,
THE RECEPTION CHANNEL IS CONFIGURED
AS INPUT CAPTURE ON FALLING EDGES.
Two stop bits
One stop bit
Stop Bits
FE
flag.
STOP BIT
SECOND
(RIEN
= 1) in rSCCR, the user
ORE
flag and the new
MOTOROLA
*