AN2502 Freescale Semiconductor / Motorola, AN2502 Datasheet - Page 10

• Manufacturer Part Number: AN2502
• Description: Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
• Manufacturer: Freescale Semiconductor / Motorola

AN2502/D
Transmission in
Normal Mode
10
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
As soon as the last bit is received, the received data message is moved from
the reception register that is being shifted in each bit reception to a
user-readable reception register. To complete a data reception, the reception
channel is configured as input capture on falling edges to detect the start bit of
the next data message to be received. Last bit reception is shown in
For transmitting data, one of the channels of the TIM is used. Using the output
compare function of the channel, it is possible to transmit bits without losing
time accuracy within bit transmissions. This is because the pin logic of the
output compare function is hardware implemented on the HC08 MCU.
As soon as the transmission is initiated, the SCISend subroutine is called. In
this subroutine, the free-running counter of the timer is read and 1 bit-time is
added and stored in the transmission channel registers.
As shown in
channel registers, the transmission channel is configured as clear on output
compare. This is done to send the start bit of the data to be transmitted.
Transmission channel registers = Current value of the free running timer + 1
bit-time.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure
Go to: www.freescale.com
0.3 BIT-TIME
1 BIT-TIME
DATA BIT
LAST
19, after the time has been stored in the transmission
SCISend SUBROUTINE
IS CALLED
Figure 19. Start Bit Transmission
Figure 18. Last Bit Reception
IDLE LINE
1 BIT-TIME
STOP BIT
AFTER RECEPTION OF THE LAST DATA BIT,
THE CHANNEL IS CONFIGURED AS
INPUT CAPTURE ON FALLING EDGES.
CLEAR OUTPUT
ON COMPARE TO
SEND START BIT
START BIT
MOTOROLA
Figure
18.