AN2491 Freescale Semiconductor / Motorola, AN2491 Datasheet - Page 7

• Manufacturer Part Number: AN2491
• Description: Simplified Mnemonics for PowerPC Instructions
• Manufacturer: Freescale Semiconductor / Motorola

For relative and absolute branches (bc[l][a]), the setting of the y bit depends on whether the displacement
field is negative or non-negative. For negative displacement fields, coding the suffix ‘+’ causes the bit to be
cleared, and coding the suffix ‘–’ causes the bit to be set. For non-negative displacement fields, coding the
suffix ‘+’ causes the bit to be set, and coding the suffix ‘–’ causes the bit to be cleared.
For branches to an address in the LR or CTR (bclr[l] or bcctr[l]), coding the suffix ‘+’ causes the y bit to
be set, and coding the suffix ‘–’ causes the bit to be cleared.
Examples of branch prediction follow:
4.4 The BI Operand—CR Bit and Field Representations
With standard branch mnemonics, the BI operand is used when it is necessary to test a CR bit, as shown in
the example in Section 4, “Branch Instruction Simplified Mnemonics,”
With simplified mnemonics, the BI operand is handled differently depending on whether the simplified
mnemonic incorporates a CR condition to test, as follows:
4.4.1 BI Operand Instruction Encoding
The entire 5-bit BI field, shown in Figure 3, represents the bit number for the CR bit to be tested. For
standard branch mnemonics and for branch simplified mnemonics that do not incorporate a CR condition,
the BI operand provides all 5 bits.
For simplified branch mnemonics described in Section 4.6, “Simplified Mnemonics that Incorporate CR
Conditions (Eliminates BO and Replaces BI with crS),” the BI operand is replaced by a crS operand. To
understand this, it is useful to view the BI operand as comprised of two parts. As Figure 3 shows, BI[0–2]
indicates the CR field and BI[3–4] represents the condition to test.
MOTOROLA
1. Branch if CR0 reflects less than condition, specifying that the branch should be predicted as taken.
2. Same as (1), but target address is in the LR and the branch should be predicted as not taken.
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blt+ target
bltlr–
Some branch simplified mnemonics incorporate only the BO operand. These simplified mnemonics
can use the architecturally defined BI operand to specify the CR bit, as follows:
— The BI operand can be presented exactly as it is with standard mnemonics—as a decimal
— Symbols can be used to replace the decimal operand, as shown in the example in Section 4,
The simplified mnemonics in Section 4.5, “Simplified Mnemonics that Incorporate the BO
Operand,” use one of these two methods to specify a CR bit.
Additional simplified mnemonics are specified that incorporate CR conditions that would otherwise
be specified by the BI operand, so the BI operand is replaced by the crS operand to specify the CR
field, CR0–CR7. See Section 4.4.1, “BI Operand Instruction Encoding.”
These mnemonics are described in Section 4.6, “Simplified Mnemonics that Incorporate CR
Conditions (Eliminates BO and Replaces BI with crS).”
number, 0–31.
“Branch Instruction Simplified Mnemonics,” where bdnzt 4 * cr5 + eq,target could be used
instead of bdnzt 22,target. This is described in Section 4.4.1.1, “Specifying a CR Bit.”
Simplified Mnemonics for PowerPC™ Instructions
Freescale Semiconductor, Inc.
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Branch Instruction Simplified Mnemonics
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