AN2491 Freescale Semiconductor / Motorola, AN2491 Datasheet - Page 13

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AN2491

Manufacturer Part Number
AN2491
Description
Simplified Mnemonics for PowerPC Instructions
Manufacturer
Freescale Semiconductor / Motorola
Datasheet

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Table 14 provides simplified mnemonics and syntax for bcl and bcla.
1
2
Table 15 provides simplified mnemonics and syntax for bclrl and bcctrl with LR updating.
MOTOROLA
Branch unconditionally
Branch if condition true
Branch if condition false
Decrement CTR, branch if CTR
Decrement CTR, branch if CTR
condition true
Decrement CTR, branch if CTR
condition false
Decrement CTR, branch if CTR = 0
Decrement CTR, branch if CTR = 0 and
condition true
Decrement CTR, branch if CTR = 0 and
condition false
Instructions for which B0 is either 12 (branch if condition true) or 4 (branch if condition false) do not depend on the
CTR value and can be alternately coded by incorporating the condition specified by the BI field. See Section 4.6,
"Simplified Mnemonics that Incorporate CR Conditions (Eliminates BO and Replaces BI with crS).”
Simplified mnemonics for branch instructions that do not test CR bits should specify only a target. A programming
error may occur.
1
Branch unconditionally
Branch if condition true
Branch if condition false
Decrement CTR, branch if CTR
Decrement CTR, branch if CTR
Decrement CTR, branch if CTR
Decrement CTR, branch if CTR = 0
Decrement CTR, branch if CTR = 0 and condition true
Decrement CTR, branch if CTR = 0 and condition false
Simplified mnemonics for branch instructions that do not test a CR bit should not specify one. A programming
error may occur.
Branch Semantics
Table 15. Simplified Mnemonics for bclrl and bcctrl with LR Update
Table 14. Simplified Mnemonics for bcl and bcla with LR Update
Branch Semantics
1
1
Simplified Mnemonics for PowerPC™ Instructions
Freescale Semiconductor, Inc.
For More Information On This Product,
0
0 and
0 and
0
0 and condition true
0 and condition false
Go to: www.freescale.com
bcl 12,BI,target
bcl 18,BI,target
bcl 10,BI,target
bcl 16,0,target
bcl 4,BI,target
bcl 0,BI,target
bcl 2,BI,target
bcl 8,0,target
bcl
bclrl 10, BI
bclrl 12,BI
bclrl 20,0
bclrl 16,0
bclrl 18,0
bclrl 4,BI
bclrl 8,BI
bclrl 0,BI
bclrl 2,BI
bdnztl BI,target
bdnzfl BI,target
bdztl BI,target
bdzfl BI,target
bdnzl target
bclrl
bdzl target
bfl BI,target
Mnemonic
btl BI,target
Simplified
Branch Instruction Simplified Mnemonics
Mnemonic
bdnztlrl BI
bdnzflrl BI
Simplified
bdztlrl BI
bdzflrl BI
bdnzlrl
bdzlrl
btlrl BI
bflrl BI
2
blrl
2
bcla 12,BI,target
bcla 18,BI,target
bcla 10,BI,target
1
bcla 16,0,target
bcla 4,BI,target
bcla 8,BI,target
bcla 0,BI,target
bcla 2,BI,target
1
1
bcla
bcctrl 12,BI
bcctrl 20,0
bcctrl 4,BI
bcctrl
bdnztla BI,target
bdnzfla BI,target
bdztla BI,target
bdzfla BI,target
bdnzla target
bdzla target
btla BI,target
bfla BI,target
Mnemonic
Mnemonic
Simplified
Simplified
btctrl BI
bfctrl BI
bctrl
1
2
2
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