AN2491 Freescale Semiconductor / Motorola, AN2491 Datasheet - Page 4

• Manufacturer Part Number: AN2491
• Description: Simplified Mnemonics for PowerPC Instructions
• Manufacturer: Freescale Semiconductor / Motorola

Branch Instruction Simplified Mnemonics
Branch Instruction Simplified Mnemonics
4 Branch Instruction Simplified Mnemonics
Branch conditional instructions can be coded with the operations, a condition to be tested, and a prediction,
as part of the instruction mnemonic rather than as numeric operands (the BO and BI operands). Table 4
shows the four general types of branch instructions. Simplified mnemonics are defined only for branch
instructions that include BO and BI operands; there is no need to simplify unconditional branch mnemonics.
The BO and BI operands correspond to two fields in the instruction opcode, as Figure 1 shows for Branch
Conditional (bc, bca, bcl, and bcla) instructions.
The BO operand specifies branch operations that involve decrementing CTR. It is also used to determine
whether testing a CR bit causes a branch to occur if the condition is true or false.
The BI operand identifies a CR bit to test (whether a comparison is less than or greater than, for example).
The simplified mnemonics avoid the need to memorize the numerical values for BO and BI.
For example, bc 16,0,target is a conditional branch that, as a BO value of 16 (0b1_0000) indicates,
decrements the CTR, then branches if the decremented CTR is not zero. The operation specified by BO is
abbreviated as d (for decrement) and nz (for not zero), which replace the c in the original mnemonic; so the
simplified mnemonic for bc becomes bdnz. The branch does not depend on a condition in the CR, so BI can
be eliminated, reducing the expression to bdnz target.
In addition to CTR operations, the BO operand provides an optional prediction bit, and a true or false
indicator can be added. For example, if the previous instruction should branch only on an equal condition
in CR0, the instruction becomes bc 8,2,target. To incorporate a true condition, the BO value becomes 8 (as
shown in Table 6); the CR0 equal field is indicated by a BI value of 2 (as shown in Table 7). Incorporating
the branch-if-true condition adds a ‘t’ to the simplified mnemonic, bdnzt. The BI value of 2 is replaced by
the eq symbol. Using the simplified mnemonic and the eq operand, the expression becomes bdnzt eq
This example tests CR0[EQ]; however, to test the equal condition in CR5 (CR bit 22), the expression
becomes bc 8,22,target. The BI operand of 22 indicates CR[22] (CR5[2], or BI field 0b10110), as shown in
Table 7. This can be expressed as the simplified mnemonic. bdnzt 4 * cr5 + eq,target.
The notation, 4 * cr5 + eq may at first seem awkward, but it eliminates computing the value of the CR bit.
It can be seen that (4 * 5) + 2 = 22. Note that although 32-bit registers in Book E processors are numbered
32–63, only values 0–31 are valid (or possible) for BI operands. As shown in Table 8, a Book E–compliant
processor automatically translates the bit values; specifying a BI value of 22 selects bit 54 on a Book E
processor, or CR5[2] = CR5[EQ].
4
0 0 1 0 0 0
0
Branch
Branch Conditional
Branch Conditional to Link Register
Branch Conditional to Count Register
5
6
Figure 1. Branch Conditional (bc) Instruction Format
Simplified Mnemonics for PowerPC™ Instructions
Instruction Name
BO
Freescale Semiconductor, Inc.
For More Information On This Product,
10 11
Table 4. Branch Instructions
Go to: www.freescale.com
BI
15 16
bc (bca bcl bcla) BO,BI,target_addr
bcctr (bcctrl)
b (ba bl bla)
Mnemonic
bclr (bclrl)
target_addr
BD
Syntax
BO,BI
BO,BI
MOTOROLA
29 30 31
,
AA LK
target.