AN2491 Freescale Semiconductor / Motorola, AN2491 Datasheet - Page 23

• Manufacturer Part Number: AN2491
• Description: Simplified Mnemonics for PowerPC Instructions
• Manufacturer: Freescale Semiconductor / Motorola

10 Recommended Simplified Mnemonics
This section describes commonly-used operations (such as no-op, load immediate, load address, move
register, and complement register).
10.1 No-Op (nop)
Many instructions can be coded in such a way that, effectively, no operation is performed. An additional
mnemonic is provided for the preferred form of no-op. If an implementation performs any type of run-time
optimization related to no-ops, the preferred form is the following:
10.2 Load Immediate (li)
The addi and addis instructions can be used to load an immediate value into a register. Additional
mnemonics are provided to convey the idea that no addition is being performed but that data is being moved
from the immediate operand of the instruction to a register.
10.3 Load Address (la)
This mnemonic permits computing the value of a base-displacement operand, using the addi instruction that
normally requires a separate register and immediate operands.
The la mnemonic is useful for obtaining the address of a variable specified by name, allowing the assembler
to supply the base register number and compute the displacement. If the variable v is located at offset dv
bytes from the address in rv, and the assembler has been told to use rv as a base for references to the data
structure containing v, the following line causes the address of v to be loaded into rD:
10.4 Move Register (mr)
Several instructions can be coded to copy the contents of one register to another. A simplified mnemonic is
provided that signifies that no computation is being performed, but merely that data is being moved from
one register to another.
The following instruction copies the contents of rS into rA. This mnemonic can be coded with a dot (.) suffix
to cause the Rc bit to be set in the underlying instruction.
MOTOROLA
1. Load a 16-bit signed immediate value into rD.
2. Load a 16-bit signed immediate value, shifted left by 16 bits, into rD.
nop
li rD,value
lis rD,value
la rD,d(rA)
la rD,v
mr rA,rS
Simplified Mnemonics for PowerPC™ Instructions
Freescale Semiconductor, Inc.
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Recommended Simplified Mnemonics
ori 0,0,0
addi rD,0,value
addis rD,0,value
addi rD,rA,d
addi rD,rv,dv
or rA,rS,rS
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