CY28341 Cypress Semiconductor, CY28341 Datasheet - Page 5

• Manufacturer Part Number: CY28341
• Description: Universal Single-Chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07367 Rev. *A
Table 4. Byte Read and Byte Write Protocol
Serial Control Registers
Byte 0: Frequency Select Register
Byte 1: CPU Clocks Register
Bit
20:27
11:18
7
6
5
4
3
2
1
0
Bit
2:8
Bit
10
19
28
29
1
9
7
6
5
4
3
2
1
0
@Pup
0
1
1
1
1
1
1
1
represents the offset of the byte to be accessed
Command Code – 8 bits “1xxxxxxx” stands for
byte operationbit[6:0] of the command code
H/W Setting
H/W Setting
H/W Setting
H/W Setting
H/W Setting
H/W Setting
48,49
53,52
53,52
Pin#
@Pup
11
Byte Write Protocol
0
0
Acknowledge from slave
Acknowledge from slave
Acknowledge from slave
Slave address – 7 bits
Byte Count – 8 bits
CPUCS_T, CPUCS_C
CPUC/CPUOD_C
CPUT/CPUOD_T
Description
Write
CPUT/C
Start
Stop
MULT0
MODE
SSCG
Name
SST1
SST0
Pin#
21
10
11
20
1
7
SELSDR_DDR Only for reading the hardware setting of the SDRAM interface
SELP4_K7
Reserved
Name
FS2
FS1
FS0
FS3
0 = Down Spread. 1 = Center Spread. See Table 9.
1 = Enable (default). 0 = Disable
1 = output enabled (running). 0 = output disabled asynchronously in a LOW
state.
1 = output enabled (running). 0 = output disable.
In K7 mode, this bit is ignored.In P4 mode, 0 = when PD# asserted LOW,
CPUT stops in a HIGH state, CPUC stops in a LOW state. In P4 mode, 1 =
when PD# asserted LOW, CPUT and CPUC stop in High-Z.
Only For reading the hardware setting of the Pin11 MULT0 value.
Select spread bandwidth. See Table 9.
Select spread bandwidth. See Table 9.
Reserved
For Selecting Frequencies see Table 1.
For Selecting Frequencies see Table 1.
For Selecting Frequencies see Table 1.
If this bit is programmed to “1,” it enables Write to bits (6:4,1) for
selecting the frequency via software (SMBus). If this bit is
programmed to a “0,” it enables only Read of bits (6:4,1), which
reflects the hardware setting of FS(0:3).
mode, status of SELSDR_DDR# strapping.
For Selecting frequencies see Table 1
Only for reading the hardware setting of the CPU interface mode,
status of SELP4_K7# strapping.
21:27
30:37
11:18
Bit
2:8
10
19
20
28
29
38
39
1
9
represents the offset of the byte to be accessed
Command Code – 8 bits “1xxxxxxx” stands for
byte operationbit[6:0] of the command code
Description
Byte Read Protocol
Data byte from slave – 8 bits
Description
Acknowledge from slave
Acknowledge from slave
Acknowledge from slave
Slave address – 7 bits
Slave address – 7 bits
Not Acknowledge
Description
Repeat start
Read
Write
Start
Stop
CY28341
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