UPD78320GJ-5BJ NEC, UPD78320GJ-5BJ Datasheet - Page 33

• Manufacturer Part Number: UPD78320GJ-5BJ
• Description: 16/8-BIT SINGLE-CHIP MICROCONTROLLER
• Manufacturer: NEC

3.6
Remarks
to the standby mode (STOP).
the inverted clock signal to the X2 pin. The X2 pin can also be left open.
Caution When using external clocks, do not set the STBC STP bit.
and fx for external clocks) into two parts.
The clock generator generates and controls internal system clocks (CLK) supplied to the CPU.
It is configured as shown in Figure 3-1.
The system clock oscillator oscillates by a crystal resonator connected to X1 and X2 pins. It stops oscillating when set
External clocks can be input to the system clock oscillator. In such cases, input a clock signal to the X1 pin and input
The divider generates internal system clocks (f
CLOCK GENERATOR
1. f
2. f
3. f
XX
X
CLK
: Crystal oscillator frequency
: External clock frequency
: Internal system clock frequency
X1
X2
Figure 3-1. Clock Generator Block Diagram
STOP Mode
System
Clock
Generator
CLK
) by dividing a system clock oscillator output (fxx for crystal oscillation
f
XX
or f
X
Divider
1/2
f
CLK
Internal System
Clock (CLK)
PD78320, 78322
33