UPD78320GJ-5BJ NEC, UPD78320GJ-5BJ Datasheet - Page 23

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UPD78320GJ-5BJ

Manufacturer Part Number
UPD78320GJ-5BJ
Description
16/8-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheet
2.2.2
of eight register banks. The general register in the bank consists of sixteen 8-bit registers.
(4)
The 8002H to 807FH address of the external memory area in place of 0002H to 007FH address can be used as each
table area by setting TPF to 1 using the software. The vector tables of the BRK instruction, operation code trap interrupt
and reset input are fixed to 003EH, 003CH and 0000H, respectively, and they are not affected by TPF.
• Table position flag (TPF)
These are 128-byte registers mapped in the special area (FE80H to FEFFH) of the internal RAM space. They consist
can be controlled by the software. All bits are reset to 0 by RESET input.
This flag is used to specify the interrupt vector table area and the memory area used as CALLT instruction table area.
As TPF has been reset to 0 after application of RESET input, the 0000H to 007FH address is used as each table area.
This is an 8-bit register consisting of CPU control related flags. It is mapped in the special function register area and
General Registers
CPU control word (CCW)
FEFFH
FE80H
RBNK0
RBNK1
RBNK2
RBNK3
RBNK4
RBNK5
RBNK6
RBNK7
Figure 2-5. General Register Memory Location
7
0
6
0
Figure 2-4. CCW Format
5
0
7
8-Bit Processing
R15
R13
R11
R9
R7
R5
R3
R1
4
0
0 7
R14
R12
R10
R8
R6
R4
R2
R0
3
0
0
2
0
TPF
1
0
0
15
16-Bit Processing
(FH)
(DH)
(BH)
(9H)
(7H)
(5H)
(3H)
(1H)
CCW
RP7
RP6
RP5
RP4
RP3
RP2
RP1
RP0
PD78320, 78322
(EH)
(CH)
(AH)
(8H)
(6H)
(4H)
(2H)
(0H)
0
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