T35L3232B TM Technology Inc., T35L3232B Datasheet - Page 14

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T35L3232B

Manufacturer Part Number
T35L3232B
Description
32k X 32 Sram Pipeline And Flow-through Burst Mode
Manufacturer
TM Technology Inc.
Datasheet
tm
TRUTH TABLE
Deselected Cycle, Power Down
Deselected Cycle, Power Down
Deselected Cycle, Power Down
Deselected Cycle, Power Down
Deselected Cycle, Power Down
Note: 1. X means "don't care." H means logic HIGH. L means logic LOW. WRITE = L means any one
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
Snooze Cycle, Power Down
READ Cycle, Begin Burst
READ Cycle, Begin Burst
WRITE Cycle, Begin Burst
READ Cycle, Begin Burst
READ Cycle, Begin Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
READ Cycle, Continue Burst
WRITE Cycle, Continue Burst
WRITE Cycle, Continue Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
READ Cycle, Suspend Burst
WRITE Cycle, Suspend Burst
WRITE Cycle, Suspend Burst
OPERATION
2.
3. All inputs except
4. Suspending burst generates wait cycle.
5. For a write operation following a read operation.
6. This device contains circuitry that will ensure the outputs will be High-Z during power-up.
7.
or more byte write enable signals
to DQ17-DQ24.
to HIGH) of CLK.
required setup time plus High-Z time for
hold time.
edge of the subsequent wait cycle. Refer to WRITE timing diagram for clarification.
GW
ADSP
BW1
edge of CLK. A WRITE cycle can be performed by setting WRITE LOW for the CLK L-H
CH
TE
= enables write to DQ1-DQ8.
= LOW along with chip being selected always initiates an internal READ cycle at the L-H
equals LOW. WRITE = H means all byte write signal are HIGH.
BW4
ADDRESS
External
External
External
External
External
OE
USED
Current
Current
Current
Current
Current
Current
None
None
None
None
None
None
Next
Next
Next
Next
Next
Next
=enables write to DQ25-DQ32.
and ZZ must meet setup and hold times around the rising edge ( LOW
CE CE2 CE2 ZZ ADSP ADSC ADV WRITE OE CLK DQ
H
X
X
X
H
H
X
H
X
X
H
H
X
H
L
L
L
L
L
L
L
L
L
X
X
H
X
H
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
BW2
BW1
X
X
X
X
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
L
,
= enables write to DQ9-DQ16.
P.7
BW2
OE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
,
X
H
H
X
H
H
H
H
H
X
X
H
X
H
H
X
X
H
X
L
L
L
L
and staying HIGH throughout the input data
OE
BW3
Preliminary T35L3232B
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
must be HIGH before the input data
or
BW4
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
L
L
L
L
L
L
Publication Date: FEB. 2000
and
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
BW3
BWE
X
X
X
X
X
X
H
X
H
H
H
X
X
H
H
X
X
L
L
L
L
L
L
= enables write
are LOW, or
Revision:0.A
L-H High-Z
L-H High-Z
L-H High-Z
L-H High-Z
L-H High-Z
L-H
L-H High-Z
L-H
L-H
L-H High-Z
L-H
L-H High-Z
L-H
L-H High-Z
L-H
L-H
L-H
L-H High-Z
L-H
L-H High-Z
L-H
L-H
X
High-Z
Q
D
Q
Q
Q
D
D
Q
Q
D
D

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