DSP56364D Motorola Inc, DSP56364D Datasheet - Page 9
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DSP56364D
Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
1.DSP56364D.pdf
(162 pages)
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1.4
MOTOROLA
PINIT/NMI
EXTAL
Signal
Name
PCAP
CLOCK AND PLL
Type
Input
Input
Input
during
Reset
State
Input
Input
Input
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 1-4 Clock and PLL Signals
External Clock Input—An external clock source must be connected
to EXTAL in order to supply the clock to the internal clock generator
and PLL.
PLL Capacitor—PCAP is an input connecting an off-chip capacitor
to the PLL filter. Connect one capacitor terminal to PCAP and the
other terminal to V
If the PLL is not used, PCAP may be tied to V
ing.
PLL Initial/Nonmaskable Interrupt—During assertion of RESET,
the value of PINIT/NMI is written into the PLL Enable (PEN) bit of the
PLL control register, determining whether the PLL is enabled or dis-
abled. After RESET de assertion and during normal instruction pro-
cessing, the PINIT/NMI Schmitt-trigger input is a
negative-edge-triggered nonmaskable interrupt (NMI) request inter-
nally synchronized to internal system clock.
This input is 5 V tolerant.
DSP56364 Advance Information
Go to: www.freescale.com
CCP
.
Signal Description
Signal/Connection Descriptions
CC
, GND, or left float-
Clock and PLL
1-5
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