DSP56364D Motorola Inc, DSP56364D Datasheet - Page 67
DSP56364D
Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
1.DSP56364D.pdf
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146
147
148
149
150
151
152
No.
MOTOROLA
SS assertion to first SCK edge
CPHA = 0
CPHA = 1
Last SCK edge to SS not asserted
Data input valid to SCK edge (data
input set-up time)
SCK last sampling edge to data input
not valid
SS assertion to data out active
SS deassertion to data high imped-
ance
SCK edge to data out valid
(data out delay time)
Table 2-17 Serial Host Interface SPI Protocol Timing (continued)
Characteristics
Freescale Semiconductor, Inc.
For More Information On This Product,
DSP56364 Advance Information
Go to: www.freescale.com
Master/
Master/
Master/
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Bypassed
Bypassed
Bypassed
Bypassed
Bypassed
Bypassed
Narrow
Narrow
Narrow
Narrow
Narrow
Narrow
Mode
Filter
Wide
Wide
Wide
Wide
Wide
Wide
Serial Host Interface SPI Protocol Timing
—
—
MAX{(20-T
MAX{(40-T
Expression
3.5 T
2.5 T
2.5 T
2.5 T
2 T
2 T
2 T
102
189
10
12
C
C
0
0
0
0
0
2
9
C
+123
+210
C
C
C
C
+33
+15
+10
+30
+50
C
C
), 0}
), 0}
Min
102
189
50
10
12
10
30
35
55
75
—
—
—
—
0
0
0
0
2
0
Specifications
Max
143
230
53
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
9
2-47
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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