HT48E10 Holtek Semiconductor, HT48E10 Datasheet - Page 9

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HT48E10

Manufacturer Part Number
HT48E10
Description
I/O Type 8-Bit MTP MCU
Manufacturer
Holtek Semiconductor
Datasheet
During the execution of an interrupt subroutine, other in-
terrupt acknowledge signals are held until the RETI in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1 (if the stack is not full). To
return from the interrupt subroutine, RET or RETI
may be invoked. RETI will set the EMI bit to enable an in-
terrupt service, but RET will not.
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the following table shows the priority that is applied.
These can be masked by resetting the EMI bit.
Once the interrupt request flags (TF, EIF) are set, they
will remain in the INTC register until the interrupts are
serviced or cleared by a software instruction. It is recom-
mended that a program does not use the CALL subrou-
tine within the interrupt subroutine. Interrupts often occur
in an unpredictable manner or need to be serviced imme-
diately in some applications. If only one stack is left and
enabling the interrupt is not well controlled, the original
control sequence will be damaged once the CALL op-
erates in the interrupt subroutine.
Oscillator Configuration
There are 2 oscillator circuits in the microcontroller.
Rev. 1.50
External Interrupt
Timer/Event Counter Overflow
Bit No.
3, 6~7
0
1
2
4
5
Interrupt Source
Label
EMI
EEI
ETI
EIF
TF
System Oscillator
Controls the master (global) interrupt (1= enable; 0= disable)
Controls the external interrupt (1= enable; 0= disable)
Controls the Timer/Event Counter 0 interrupt (1= enable; 0= disable)
Unused bit, read as 0
External interrupt request flag (1= active; 0= inactive)
Internal Timer/Event Counter 0 request flag (1= active; 0= inactive)
Priority
1
2
Vector
04H
08H
INTC (0BH) Register
9
All of them are designed for system clocks, namely, ex-
ternal RC oscillator and external Crystal oscillator,
which are determined by options. No matter what oscil-
lator type is selected, the signal provides the system
clock. The HALT mode stops the system oscillator and
ignores an external signal to conserve power.
If an RC oscillator is used, an external resistor between
OSC1 and VDD is required and the resistance must
range from 24k to 1M . The system clock, divided by
4, is available on OSC2, which can be used to synchro-
nize external logic. The RC oscillator provides the most
cost effective solution. However, the frequency of oscil-
lation may vary with VDD, temperatures and the chip it-
self due to process variations. It is, therefore, not
suitable for timing sensitive operations where an accu-
rate oscillator frequency is desired.
If a crystal oscillator is used, a crystal across OSC1 and
OSC2 is needed to provide the feedback and phase
shift required for the oscillator. No other external compo-
nents are required. In stead of a crystal, a resonator can
also be connected between OSC1 and OSC2 to obtain
a frequency reference, but two external capacitors in
OSC1 and OSC2 are required.
The WDT oscillator is a free running on-chip RC oscilla-
tor, and no external components are required. Even if
the system enters the power down mode and the sys-
tem clock is stopped, the oscillator still works within a
period of 65 s at 5V. The WDT oscillator can be dis-
abled by options to conserve power.
Function
October 31, 2006
www.DataSheet4U.com
HT48E10

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