HT48E10 Holtek Semiconductor, HT48E10 Datasheet

no-image

HT48E10

Manufacturer Part Number
HT48E10
Description
I/O Type 8-Bit MTP MCU
Manufacturer
Holtek Semiconductor
Datasheet
Technical Document
Features
General Description
The HT48E10 is an 8-bit high performance, RISC archi-
tecture microcontroller device specifically designed for
multiple I/O control product applications.
The advantages of low power consumption, I/O flexibil-
ity, timer functions, oscillator options, HALT and
Rev. 1.50
Tools Information
FAQs
Application Note
Operating voltage:
f
f
Low voltage reset function
19 bidirectional I/O lines (max.)
Interrupt input shared with an I/O line
8-bit programmable timer/event counter with overflow
interrupt and 8-stage prescaler
On-chip crystal and RC oscillator
Watchdog Timer
1,000 erase/write cycles MTP program memory
1024 14 program memory ROM (MTP)
128 8 data memory EEPROM
64 8 data memory RAM
SYS
SYS
HA0086E HT48E MCU Series - Using Assembly Language to Write to the 1K EEPROM Data Memory
HA0087E HT48E MCU Series - Using C Language to Write to the 1K EEPROM Data Memory
HA0088E HT48E MCU Series - Using Assembly Language to Write to the 2K EEPROM Data Memory
HA0089E HT48E MCU Series - Using C Language to Write to the 2K EEPROM Data Memory
=4MHz: 2.2V~5.5V
=8MHz: 3.3V~5.5V
I/O Type 8-Bit MTP MCU With EEPROM
1
wake-up functions, watchdog timer, buzzer driver, as
well as low cost, enhance the versatility of these devices
to suit a wide range of application possibilities such as
industrial control, consumer products, subsystem con-
trollers, etc.
Buzzer driving pair and PFD supported
HALT function and wake-up feature reduce power
consumption
4-level subroutine nesting
Up to 0.5 s instruction cycle with 8MHz system clock
at V
Bit manipulation instruction
14-bit table read instruction
63 powerful instructions
10
EEPROM data retention > 10 years
All instructions in one or two machine cycles
In system programming (ISP)
24-pin SKDIP/SOP package
6
DD
erase/write cycles EEPROM data memory
=5V
HT48E10
October 31, 2006
www.DataSheet4U.com

Related parts for HT48E10

HT48E10 Summary of contents

Page 1

... ROM (MTP) 128 8 data memory EEPROM 64 8 data memory RAM General Description The HT48E10 is an 8-bit high performance, RISC archi- tecture microcontroller device specifically designed for multiple I/O control product applications. The advantages of low power consumption, I/O flexibil- ity, timer functions, oscillator options, HALT and Rev ...

Page 2

... Block Diagram Pin Assignment Rev. 1.50 2 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 3

... Operating Temperature........................... Total............................................................ 100mA OH Test Conditions V Conditions DD f =4MHz SYS f =8MHz SYS 3V No load, f =4MHz SYS load, f =4MHz SYS 5V No load, f =8MHz 5V SYS 3 HT48E10 www.DataSheet4U.com Ta=25 C Min. Typ. Max. Unit 2.2 5.5 V 3.3 5.5 V 0.6 1 0.8 1 October 31, 2006 ...

Page 4

... Test Conditions Min. V Conditions DD 2.2V~5.5V 400 3.3V~5.5V 400 2.2V~5.5V 400 3.3V~5.5V 400 2.2V~5.5V 0 3.3V~5. Without WDT prescaler 5V 8 Without WDT prescaler 1 Wake-up from HALT 1 4 HT48E10 www.DataSheet4U.com Typ. Max. Unit 0. 0. 3.0 3 ...

Page 5

... Functional Description Execution Flow The HT48E10 system clock is derived from either a crystal oscillator and is internally divided into four non-overlapping clocks. One instruction cycle con- sists of four system clock cycles. Instruction fetching and execution are pipelined in such a way that a fetch takes an instruction cycle while de- coding and execution takes the next instruction cycle ...

Page 6

... All table related instructions require two cycles to complete the operation. These areas may function as normal program memory depending on the requirements. Table Location * Table Location P9~P8: Current program counter bits 6 HT48E10 www.DataSheet4U.com * October 31, 2006 ...

Page 7

... Arithmetic operations (ADD, ADC, SUB, SBC, DAA) Logic operations (AND, OR, XOR, CPL) Rotation (RL, RR, RLC, RRC) Increment and Decrement (INC, DEC) Branch decision (SZ, SNZ, SIZ, SDZ ....) The ALU not only saves the results of a data operation but also changes the status register. 7 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 8

... When the interrupt is enabled, the stack is not full and the TF bit is set, a subroutine call to location 08H will oc- cur. The related interrupt request flag (TF) will be reset and the EMI bit cleared to disable further interrupts. Function Status (0AH) Register 8 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 9

... Even if the system enters the power down mode and the sys- tem clock is stopped, the oscillator still works within a period 5V. The WDT oscillator can be dis- abled by options to conserve power. 9 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 10

... HALT instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only resets the Program Counter and SP; the others remain in their original status. Watchdog Timer 10 HT48E10 www.DataSheet4U.com CLR WDT1 and CLR WDT2 . Of CLR WDT times selection October 31, 2006 ...

Page 11

... The functional unit chip reset status are shown below. Program Counter 000H Interrupt Disable Prescaler Clear Clear. After master reset, WDT WDT begins counting Timer/Event Counter Off Input/Output Ports Input mode Stack Pointer Points to the top of the stack 11 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 12

... TMR returns to the original level and resets the TON. The measured result will re- main in the timer/event counter even if the activated transient occurs again. In other words, only one cycle 12 HT48E10 www.DataSheet4U.com RES Reset WDT Time-out (HALT) (HALT)* ...

Page 13

... The definitions are as shown. The overflow signal of the timer/event counter can be used to generate PFD signals for buzzer driving. Function =f /2 SYS =f /4 SYS =f /8 SYS =f /16 SYS =f /32 SYS =f /64 SYS =f /128 SYS =f /256 SYS TMRC (0EH) Register Timer/Event Counter 13 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 14

... data HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 15

... Low Voltage Reset - LVR The HT48E10 provides a low voltage reset circuit in or- der to monitor the supply voltage of the device. If the supply voltage drops to within the range 0.9V~V such as when changing a battery, the LVR will automati- cally reset the device internally ...

Page 16

... EEPROM data memory select 5 SK Serial clock input to EEPROM data memory 6 DI Serial data input to EEPROM data memory 7 DO Serial data output from EEPROM data memory EEPROM Data Memory Block Diagram Rev. 1.50 Low Voltage Reset Function EECR (40H) Register 16 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 17

... READY indicator the CS pin must be high; otherwise DO will high state. For successful instructions, CS must be low after the instruction is sent. After power-on, the device is by default in the EWDS state. An EWEN in- struction must be performed before any ERASE or WRITE instruction can be executed. 17 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 18

... So not necessary to erase data before the WRITE instruction. During the in- ternal writing, we can verify the busy/ready status high. The DO will remain low but when the operation is over, the DO will return to high and further instructions can be executed. 18 HT48E10 www.DataSheet4U.com Ta=25 C Unit Max. 1 MHz ...

Page 19

... SK clock is not required. During the internal write-all operation, the busy/ready status can be verified high. The DO will remain low but when the operation is over the DO will return to high and further instruction can be executed. 19 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 20

... Write data EWEN Erase/Write Enable EWDS Erase/Write Disable ERAL Erase All WRAL Write All Note: X stands for don t care² Rev. 1.50 Start bit Op Code Address 1 10 A6~ A6~ A6~ 11XXXXX 1 00 00XXXXX 1 00 10XXXXX 1 00 01XXXXX 20 HT48E10 www.DataSheet4U.com Data D7~D0 D7~D0 D7~D0 October 31, 2006 ...

Page 21

... Timer/event counter clock source wake- CMOS/Schmitt input 6 PA pull-high enable or disable 7 PB pull-high enable or disable 8 PC pull-high enable or disable 9 BZ/BZ enable or disable 10 LVR function: enable or disable 11 System oscillator crystal Application Circuits Rev. 1.50 Options /4 or disable SYS SYS 21 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 22

... RES high. * Make the length of the wiring, which is connected to the RES pin as short as possible, to avoid noise interference. Rev. 1.50 C1, C2 0pF 10pF 0pF 25pF 25pF 35pF 300pF 300pF 300pF 22 HT48E10 www.DataSheet4U.com R1 10k 12k 10k 10k 10k 27k 9.1k 10k 10k October 31, 2006 ...

Page 23

... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.50 Description 23 HT48E10 www.DataSheet4U.com Instruction Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV 1 Z,C,AC,OV (1) ...

Page 24

... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. Rev. 1.50 Description 24 HT48E10 www.DataSheet4U.com Instruction Flag Cycle Affected 2 None (2) 1 None ...

Page 25

... Add the accumulator to the data memory Description The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. Operation [m] ACC+[m] Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 26

... Program Counter Affected flag(s) TO CLR [m] Clear data memory Description The contents of the specified data memory are cleared to 0. Operation [m] 00H Affected flag(s) TO Rev. 1.50 PDF PDF PDF addr PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 27

... Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] [m] Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 28

... The contents of the data memory remain unchanged. Operation ACC [m] 1 Affected flag(s) TO Rev. 1.50 PDF (ACC.3~ACC.0)+6, AC1=AC (ACC.3~ACC.0), AC1=0 ACC.7~ACC.4+6+AC1,C=1 ACC.7~ACC.4+AC1,C=C PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 29

... Move data memory to the accumulator Description The contents of the specified data memory are copied to the accumulator. Operation ACC [m] Affected flag(s) TO Rev. 1.50 Program Counter+1 PDF PDF PDF addr PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 30

... Data in the data memory (one of the data memories) and the accumulator perform a bitwise logical_OR operation. The result is stored in the data memory. Operation [m] ACC OR [m] Affected flag(s) TO Rev. 1.50 PDF PDF Program Counter+1 PDF PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 31

... The contents of the data memory remain unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) TO Rev. 1.50 Stack PDF Stack PDF Stack PDF PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 32

... Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. Operation [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 Affected flag(s) TO Rev. 1.50 PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 33

... Otherwise proceed with the next instruction (1 cycle). Operation Skip if ([m] 1)=0, ACC Affected flag(s) TO Rev. 1.50 PDF PDF PDF ([m] 1) PDF ([m] 1) PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 34

... Other- wise proceed with the next instruction (1 cycle). Operation Skip if [m].i 0 Affected flag(s) TO Rev. 1.50 PDF PDF ([m]+1) PDF ([m]+1) PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 35

... The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. Operation ACC.3~ACC.0 ACC.7~ACC.4 Affected flag(s) TO Rev. 1.50 PDF PDF PDF [m].7~[m].4 PDF [m].7~[m].4 [m].3~[m].0 PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 36

... The low byte of ROM code (last page) addressed by the table pointer (TBLP) is moved to the data memory and the high byte transferred to TBLH directly. Operation [m] ROM code (low byte) TBLH ROM code (high byte) Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 37

... Logical XOR immediate data to the accumulator Description Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ACC XOR x Affected flag(s) TO Rev. 1.50 PDF PDF PDF HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 38

... Package Information 24-pin SKDIP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 1235 255 125 125 16 50 100 295 345 0 38 HT48E10 www.DataSheet4U.com Max. 1265 265 135 145 20 70 315 360 15 October 31, 2006 ...

Page 39

... SOP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 394 290 14 590 HT48E10 www.DataSheet4U.com Max. 419 300 20 614 104 October 31, 2006 ...

Page 40

... Product Tape and Reel Specifications Reel Dimensions SOP 24W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.50 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 40 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 41

... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.50 Dimensions in mm 24.0 0.3 12.0 0.1 1.75 0.1 11.5 0.1 1.55+0.1 1.5+0.25 4.0 0.1 2.0 0.1 10.9 0.1 15.9 0.1 3.1 0.1 0.35 0.05 21.3 41 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Page 42

... Holtek s products are not authorized for use as critical components in life support devices or sys- tems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.50 42 HT48E10 www.DataSheet4U.com October 31, 2006 ...

Related keywords