HT46R74D-1 Holtek Semiconductor, HT46R74D-1 Datasheet - Page 7

• Manufacturer Part Number: HT46R74D-1
• Description: Dual Slope A/D Type MCU
• Manufacturer: Holtek Semiconductor

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Functional Description
Execution Flow
The system clock is derived from either a crystal or an
external RC oscillator. It is internally divided into four
non-overlapping clocks. One instruction cycle consists
of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes one instruction cycle while de-
coding and execution takes the next instruction cycle.
The pipelining scheme makes it possible for each in-
struction to be effectively executed in a cycle. If an in-
struction changes the value of the program counter, two
cycles are required to complete the instruction.
Program Counter - PC
The program counter is 12 bits wide and controls the se-
quence in which the instructions stored in the program
ROM are executed. The contents of the PC can specify
a maximum of 4096 addresses.
Note:
Rev. 1.10
Initial Reset
External Interrupt 0
External Interrupt 1
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
ADC Interrupt
RTC Interrupt
Skip
Loading PCL
Jump, Call Branch
Return from Subroutine
*11~*0: Program counter bits
#11~#0: Instruction code bits
Mode
S11
#11
*11
*11
0
0
0
0
0
0
0
S10
#10
*10
*10
0
0
0
0
0
0
0
Program Counter
Execution Flow
S9
#9
*9
*9
0
0
0
0
0
0
0
#8
S8
7
*8
*8
0
0
0
0
0
0
0
After accessing a program memory word to fetch an in-
struction code, the value of the PC is incremented by 1.
The PC then points to the memory word containing the
next instruction code.
When executing a jump instruction, conditional skip ex-
ecution, loading the PCL register, a subroutine call, an
initial reset, an internal interrupt, an external interrupt, or
returning from a subroutine, the PC manipulates the
program transfer by loading the address corresponding
to each instruction.
The conditional skip is activated by instructions. Once
the condition is met, the next instruction, fetched during
the current instruction execution, is discarded and a
dummy cycle replaces it to get a proper instruction, oth-
erwise the program proceeds with the next instruction.
The lower byte of the Program Counter, PCL, is a read-
able and writeable register. Moving data into the PCL
register performs a short jump. The destination must be
within 256 locations.
S11~S0: Stack register bits
@7~@0: PCL bits
@7
#7
S7
*7
0
0
0
0
0
0
0
Program Counter+2
Program Counter
@6
S6
#6
*6
0
0
0
0
0
0
0
@5
S5
#5
*5
0
0
0
0
0
0
0
@4
S4
#4
*4
0
0
0
0
1
1
1
@3
S3
#3
*3
0
0
1
1
0
0
1
HT46R74D-1
@2
S2
#2
*2
0
1
0
1
0
1
0
January 11, 2007
@1
#1
S1
*1
0
0
0
0
0
0
0
@0
#0
S0
*0
0
0
0
0
0
0
0