HT46R74D-1 Holtek Semiconductor, HT46R74D-1 Datasheet - Page 30

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HT46R74D-1

Manufacturer Part Number
HT46R74D-1
Description
Dual Slope A/D Type MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
Options
The following shows the options in the device. All these options should be defined in order to ensure a proper function-
ing system.
Rev. 1.10
OSC type selection.
There are two types selection: Crystal OSC or RC OSC
System clock selection: OSC or RTC
f
There are three types of selections: f
WDT clock source selection.
There are various types of selections: system clock/4, WDT or RTC
WDT enable/disable selection.
The WDT function can be enabled or disabled by this configuration option.
WDT time-out period selection.
There are four types of selection: WDT clock source divided by 2
CLR WDT times selection.
This option selects the instruction method of clearing the WDT. One time means that the CLR WDT instruction
can clear the WDT. Two times means only if both the CLR WDT1 and CLR WDT2 instructions have been exe-
cuted, can the WDT be cleared.
Buzzer output frequency selection.
There are eight types of frequency signals for the buzzer output: f
Wake-up selection.
This option defines the wake-up capability. A falling edge on each external pin on PA has the capability to wake-up
the device from a Power Down condition. Bit option.
Pull-high selection.
Selects pull-high resistors when the I/O in in the input mode. Bit options.
I/O pins shared with other function selections.
PA0/BZ, PA1/BZ: PA0 and PA1 can be setup as I/O pins or buzzer outputs. PA3 can be setup as an I/O pin or as a
PFD output.
PFD clock source selection: Timer/Event Counter 0 or Timer/Event Counter 1
LCD common selection.
There are three types of selections: 2 commons (1/2 duty), 3 commons (1/3 duty) or 4 commons (1/4 duty).
LCD bias selection.
This option is to determine what kind of bias is selected, 1/2 bias or 1/3 bias.
LCD segment logic output
This option is to determine if pins SEG0~SEG7 are to be setup as logic outputs or setup as segment outputs - bit op-
tion
LCD driver clock frequency selection.
There are a range of frequency signals for the LCD driver circuits: f
LCD ON/OFF when in Power Down Mode selection
LVR selection.
LVR enable or disable option
LVD selection.
LVD enable or disable option
LVR voltage selection: 2.2V or 3.3V
LVD voltage selection: LVR+0.2 or regulator+0.2
INT trigger edge selection: disable; high to low; low to high; low to high or high to low
Partial-lock selection: Page0~3, Page4~6, Page7.
S
clock source.
SYS
/4, WDT or RTC
Options
30
16
S
/2
/f
S
S
/2
2
, 2
~f
2
~f
S
15
/2
S
/f
/2
9
S
. f
, 2
8
S
14
/f
S
or 2
13
/f
S
HT46R74D-1
January 11, 2007

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