IDT72V3642L10PF IDT, Integrated Device Technology Inc, IDT72V3642L10PF Datasheet - Page 24

IC FIFO SYNC 3.3V CMOS 120-TQFP

IDT72V3642L10PF

Manufacturer Part Number
IDT72V3642L10PF
Description
IC FIFO SYNC 3.3V CMOS 120-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V3642L10PF

Function
Synchronous
Memory Size
72M (1M x 72)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3642L10PF
800-1534

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V3642L10PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V3642L10PF
Manufacturer:
XILINX
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Part Number:
IDT72V3642L10PF8
Manufacturer:
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Quantity:
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NOTE:
1. t
NOTES:
1. t
2. FIFO1 Write (CSA = LOW, W/RA = LOW, MBA = LOW), FIFO1 read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO1 output register has been read from the FIFO.
IDT72V3622/72V3632/72V3642 CMOS 3.3V SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
A0-A35
CLKA
CLKB
B0-B35
ENA
AEB
ENB
CLKB edge is less than t
CLKB edge is less than t
CLKA
W/RA
CLKB
W/RB
SKEW1
SKEW2
MBA
MBB
ENA
CSA
EFA
CSB
ENB
FFB
is the minimum time between a rising CLKA edge and a rising CLKB edge for FFB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
is the minimum time between a rising CLKA edge and a rising CLKB edge for AEB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
LOW
FIFO2 Full
LOW
LOW
LOW
LOW
HIGH
Previous Word in FIFO2 Output Register
t
CLKH
X1 Words in FIFO1
t
SKEW1
SKEW2
ENS2
Figure 15. FFB
t
CLK
Figure 16. Timing for AEB
, then FFB may transition HIGH one CLKB cycle later than shown.
, then AEB may transition HIGH one CLKB cycle later than shown.
t
ENS2
t
CLKL
FFB
FFB
FFB
FFB Flag Timing and First Available Write when FIFO2 is Full (IDT Standard Mode)
t
ENH
t
SKEW2
t
t
SKEW1
ENH
(1)
t
A
AEB
AEB
AEB
AEB when FIFO1 is Almost-Empty (IDT Standard and FWFT Modes)
1
(1)
1
t
TM
CLKH
t
CLK
24
t
CLKL
2
t
PAE
2
t
Next Word From FIFO2
WFF
t
t
ENS2
ENS2
t
DS
COMMERCIAL TEMPERATURE RANGE
To FIFO2
(X1+1) Words in FIFO1
Write
t
ENS2
t
t
t
WFF
t
ENH
DH
ENH
t
ENH
t
PAE
4660 drw 17
4660 drw 18

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