IDT70T3509M Integrated Device Technology, IDT70T3509M Datasheet - Page 16

• Manufacturer Part Number: IDT70T3509M
• Description: High-speed 2.5v 1024k X 36 Synchronous Dual-port Static Ram With 3.3v Or 2.5v Interface
• Manufacturer: Integrated Device Technology

Timing Waveform of Write with Address Counter Advance
(Flow-through or Pipelined Inputs)
NOTES:
1. CE
2. CE
3. The "Internal Address" is equal to the "External Address" when ADS = V
4. No dead cycle exists during REPEAT operation. A READ or WRITE cycle may be coincidental with the counter REPEAT cycle: Address loaded by last valid
5. CNTEN = V
6. For Pipelined Mode user should add 1 cycle latency for outputs as per timing waveform of read cycle for pipelined operations.
7. Address A
Timing Waveform of Counter Repeat
IDT70T3509M
High-Speed 2.5V
ADS load will be accessed. For more information on REPEAT function refer to Truth Table II. A
function to guarantee the correct address location is loaded.
written to during this cycle.
value of a A
sure that A
transition reflects An = 7FFFF
0
0
, BE
, BE
n
n
INTERNAL
ADDRESS
, and R/W = V
INTERNAL
ADDRESS
REPEAT
= V
19
DATA
19
IL
A
DATA
A
DATA
CNTEN
19
CNTEN
must be managed as part of a full depth counter implementation using the IDT70T3509M. For physical addresses 00000
0 -
0 -
IL
is actively driven from 0-to-1 or 1-to-0 and held as needed at the appropriate address boundaries for full depth counter operation. As shown this
advances Internal Address from ‘An’ to ‘An +1’. The transition shown indicates the time required for the counter to advance. The ‘An +1’Address is
A
A
CLK
ADS
R/
OUT
; CE
CLK
A
19
is 0, while for physical addresses 80000
ADS
A
19
18
(4)
W
IN
(7)
(3)
18
(7)
IN
1
(3)
= V
1024K x 36 Dual-Port Synchronous Static RAM
t
SRPT
t
IL
t
t
SAD
t
SW
SD
IH
SA
; CE
D
An
.
0
t
t
t
t
t
t
HW
HRPT
t
HD
t
SA
SAD
HA
HAD
SD
1
An
WRITE TO
ADDRESS
H
An
Dn
EXTERNAL
ADDRESS
and REPEAT = V
or FFFFF
t
t
CYC2
ADS
t
WRITE
An
t
HAD
HD
HA
t
CH2
t
SCN
t
t
SA
CYC2
D
1
t
HCN
An
H
An+1
.
t
ADVANCE
COUNTER
WRITE TO
CL2
(5)
t
t
SCN
An+1
SA
Dn + 1
(7)
IH
t
(5)
WITH COUNTER
HCN
.
D
WRITE
2
H
An+2
ADVANCE
COUNTER
WRITE TO
(7)
through FFFFF
An+2
Dn + 1
An + 1
COUNTER HOLD
D
3
An+2
COUNTER
WRITE TO
WRITE
HOLD
An+2
IL
H
(1)
and equals the counter output when ADS = V
the value of A
6.42
16
(2,6)
Dn + 2
READ LAST
ADDRESS
An
REPEAT
t
CD1
ADS
An
An
19
is 1. The user needs to keep track of the device counter and make
An + 2
19
An+1
ADVANCE
COUNTER
Dn + 3
must be in the appropriate state when using the REPEAT
READ
WRITE WITH COUNTER
An+1
An+1
An + 3
An+2
ADVANCE
COUNTER
READ
An+2
An+2
,
Dn + 4
Commercial Temperature Range
IH
.
An+2
An + 4
COUNTER
5682 drw 17a
HOLD
READ
An+2
An+2
5682 drw 18a
H
,
through 7FFFF
H
the