CMR3000-D0X VTI Hamlin, CMR3000-D0X Datasheet - Page 11

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CMR3000-D0X

Manufacturer Part Number
CMR3000-D0X
Description
Cmr3000-d0x Block Diagram With Digital Spi And I 2 C Interface
Manufacturer
VTI Hamlin
Datasheet
4
4.1 SPI Interface
4.1.1
VTI Technologies Oy
Myllynkivenkuja 6
P.O. Box 27
FI-01621 Vantaa
www.vti.fi
Serial Interfaces
SPI frame format
Communication between the CMR3000 sensor and master controller is based on serial data
transfer and a dedicated interrupt line (INT-pin). Two different serial interfaces are available for the
CMR3000 sensor: SPI and I
is done using the chip select signal. The I
register content. The CMR3000 acts as a slave on both the SPI and I
SPI bus is a full duplex synchronous 4-wire serial interface. It consists of one master device and
one or more slave devices. The master is defined as a micro controller providing the SPI clock, and
the slave as any integrated circuit receiving the SPI clock from the master. The CMR3000 sensor
always operates as a slave device in master-slave operation mode. A typical SPI connection is
presented in Figure 3.
Figure 3. Typical SPI connection
The data transfer uses the following 4-wire interface:
CMR3000 SPI frame format and transfer protocol is presented in Figure 4 below.
Figure 4. SPI frame format
Each communication frame contains 16 bits. The first 8 bits in MOSI line contain info about the
register address being accessed and the operation (read/write). The first 6 bits define the 6 bit
MOSI
MISO
CSB
SCK
A5
‘X’
1
A4
2
MOSI
MISO
SCK
CSB
A3
3
Doc.Nr. 82112900.A.02
PORST
A2
4
2
C (Phillips specification V2.1). Selection between these two interfaces
master out slave in
master in slave out
serial clock
chip select (low active)
A1
5
A0
6
RB/W
7
2
C interface can be also disabled by re-configuring
8
DO7
DI7
9
DO6
DI6
CMR3000 → µC
µC → CMR3000
µC → CMR3000
µC → CMR3000
10
DO5
DI5
11
DO4
DI4
2
C bus.
12
DO3
DI3
13
DO2
DI2
CMR3000-D0X Series
14
DO1
DI1
15
DO0
DI0
16
Rev. A.02
11/ 26

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