ISL98001 Intersil Corporation, ISL98001 Datasheet - Page 6

• Manufacturer Part Number: ISL98001
• Description: Triple Video Digitizer
• Manufacturer: Intersil Corporation

R
R
SDA OUT
P
S
/G
/G
SDA IN
DATACLK
HSYNC
DATACLK
DATACLK
Pixel Data
P
S
Video In
SCL
/B
/B
Analog
HS
P
S
[7:0]
[7:0]
OUT
IN
t
SU:STA
t
HD:STA
P
6
0
t
F
P
1
FIGURE 2. DATA OUTPUT SETUP AND HOLD TIMING
t
SU:DAT
t
HSYNCin-to-HSout
P
FIGURE 1. 2-WIRE INTERFACE TIMING
2
The HSYNC edge (programmable leading or trailing) that the DPLL is locked to.
The sampling phase setting determines its relative position to the rest of the AFE’s output signals
8 DATACLK Pipeline Latency
FIGURE 3. 24-BIT OUTPUT MODE
t
HIGH
t
SETUP
P
3
= 7.5ns + (PHASE/64 +8.5)*t
ISL98001
t
LOW
P
4
t
HOLD
t
HD:DAT
Width and Polarity
P
Programmable
5
P
t
PIXEL
R
6
t
AA
P
7
t
DH
P
8
D
0
P
t
9
BUF
D
1
t
P
SU:STO
10
D
2
P
11
March 8, 2006
FN6148.3
D
3
P
12