ISL98001 Intersil Corporation, ISL98001 Datasheet - Page 12

• Manufacturer Part Number: ISL98001
• Description: Triple Video Digitizer
• Manufacturer: Intersil Corporation

Register Listing
0x00
0x01
0x02
0x03
0x04
ADDRESS
Device ID
(read only)
SYNC Status
(read only)
SYNC Polarity
(read only)
HSYNC Slicer (0x33)
SOG Slicer (0x16)
Note: Due to normal device-to-device
variation in slicer levels, SOG Slicer settings
of 0 (0mV), 1 (20mV), and 2 (40mV) may not
be functional. The minimum recommended
SOG Slicer setting is 3 (60mV).
REGISTER (DEFAULT VALUE)
12
BIT(S)
3:0
7:4
7:6
2:0
6:4
3:0
7:6
0
1
2
3
4
5
6
7
0
1
2
3
4
5
3
7
4
5
ISL98001
Device Revision
Device ID
HSYNC1 Active
HSYNC2 Active
VSYNC1 Active
VSYNC2 Active
SOG1 Active
SOG2 Active
PLL Locked
CSYNC Detect at
Sync Splitter
HSYNC1
Polarity
HSYNC2
Polarity
VSYNC1
Polarity
VSYNC2
Polarity
HSYNC1
Trilevel
HSYNC2
Trilevel
N/A
HSYNC1 Threshold
Reserved
HSYNC2 Threshold
Disable Glitch Filter
SOG1 and SOG2
Threshold
SOG Filter
Enable
SOG Hysteresis
Disable
Reserved
FUNCTION NAME
1 = initial silicon, 2 = second revision, etc.
1 = ISL98001
0: HSYNC1 is Inactive
1: HSYNC1 is Active
0: HSYNC2 is Inactive
1: HSYNC2 is Active
0: VSYNC1 is Inactive
1: VSYNC1 is Active
0: VSYNC2 is Inactive
1: VSYNC2 is Active
0: SOG1 is Inactive
1: SOG1 is Active
0: SOG2 is Inactive
1: SOG2 is Active
0: PLL is unlocked
1: PLL is locked to incoming HSYNC
0: Composite Sync signal not detected
1: Composite Sync signal is detected
0: HSYNC1 is Active High
1: HSYNC1 is Active Low
0: HSYNC2 is Active High
1: HSYNC2 is Active Low
0: VSYNC1 is Active High
1: VSYNC1 is Active Low
0: VSYNC2 is Active High
1: VSYNC2 is Active Low
0: HSYNC1 is Standard Sync
1: HSYNC1 is Trilevel Sync
0: HSYNC2 is Standard Sync
1: HSYNC2 is Trilevel Sync
Returns 0
000 = lowest (0.4V) All values referred to
011 = default (1.6V) voltage at HSYNC input
111 = highest (3.2V) pin, 240mV hysteresis
Set to 00
See HSYNC1
0: HSYNC/VSYNC Glitch Filter Enabled (default)
1: HSYNC/VSYNC Glitch Filter Disabled
0x0 = lowest (0mV)
0x6 = default (120mV) 20mV step size
0xF = highest (300mV)
0: SOG low pass filter disabled
1: SOG low pass filter enabled, 14MHz corner
(default)
0: 40mV SOG hysteresis enabled
1: 40mV SOG hysteresis disabled (default)
Set to 00.
DESCRIPTION
March 8, 2006
FN6148.3