PIC16F627-04 Microchip Technology, PIC16F627-04 Datasheet - Page 92

• Manufacturer Part Number: PIC16F627-04
• Description: FLASH-Based 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

PIC16F62X
13.2
EECON1 is the control register with five low order bits
physically implemented. The upper-three bits are non-
existent and read as ’0’s.
Control bits RD and WR initiate read and write,
respectively. These bits cannot be cleared, only set, in
software. They are cleared in hardware at completion
of the read or write operation. The inability to clear the
WR bit in software prevents the accidental, premature
termination of a write operation.
REGISTER 13-2: EECON1 REGISTER (ADDRESS 9Ch) DEVICES
DS40300B-page 92
bit 7:4
bit 3
bit 2
bit 1
bit 0
bit7
—
U
EECON1 AND EECON2 REGISTERS
Unimplemented: Read as '0'
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
1 = initiates a write cycle. (The bit is cleared by hardware once write is complete. The WR bit can only
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read (read takes one cycle. RD is cleared in hardware. The RD bit can only be
0 = Does not initiate an EEPROM read
—
U
(any MCLR reset, any WDT reset during normal operation or BOD detect)
be set (not cleared) in software.
set (not cleared) in software).
—
U
—
U
WRERR
R/W-x
Preliminary
WREN
R/W-0
The WREN bit, when set, will allow a write operation.
On power-up, the WREN bit is clear. The WRERR bit
is set when a write operation is interrupted by a MCLR
reset or a WDT time-out reset during normal opera-
tion. In these situations, following reset, the user can
check the WRERR bit and rewrite the location. The
data and address will be unchanged in the EEDATA
and EEADR registers.
Interrupt flag bit EEIF in the PIR1 register is set when
write is complete. This bit must be cleared in software.
EECON2 is not a physical register. Reading EECON2
will read all ’0’s. The EECON2 register is used
exclusively in the Data EEPROM write sequence.
R/S-0
WR
R/S-x
bit0
RD
R = Readable bit
W = Writable bit
S = Settable bit
U = Unimplemented bit,
-n = Value at POR reset
1999 Microchip Technology Inc.
read as ‘0’