PIC16F627-04 Microchip Technology, PIC16F627-04 Datasheet - Page 16

• Manufacturer Part Number: PIC16F627-04
• Description: FLASH-Based 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

PIC16F62X
TABLE 4-2:
DS40300B-page 16
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend: : — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
Note 1: Other (non power-up) resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during
Address
shaded = unimplemented
normal operation.
INDF
OPTION
PCL
STATUS
FSR
TRISA
TRISB
Unimplemented
Unimplemented
Unimplemented
PCLATH
INTCON
PIE1
Unimplemented
PCON
Unimplemented
Unimplemented
Unimplemented
PR2
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
TXSTA
SPBRG
EEDATA
EEADR
EECON1
EECON2
Unimplemented
VRCON
Name
SPECIAL FUNCTION REGISTERS SUMMARY BANK1
Addressing this location uses contents of FSR to address data memory (not a physical reg-
ister)
RBPU
Program Counter’s (PC) Least Significant Byte
IRP
Indirect data memory address pointer
TRISA7
TRISB7
GIE
EEIE
Timer2 Period Register
CSRC
Baud Rate Generator Register
EEPROM data register
EEPROM control register 2 (not a physical register)
VREN
Bit 7
—
—
—
—
INTEDG
RP1
TRISA6
TRISB6
PEIE
CMIE
TX9
EEPROM address register
VROE
Bit 6
—
—
—
T0CS
RP0
TRISB5
T0IE
RCIE
TXEN
VRR
Bit 5
—
—
—
—
Preliminary
T0SE
TO
TRISA4
TRISB4
Write buffer for upper 5 bits of program counter
INTE
TXIE
SYNC
Bit 4
—
—
—
PSA
PD
TRISA3
TRISB3
RBIE
OSCF
WRERR
VR3
Bit 3
—
—
PS2
Z
TRISB2
T0IF
WREN
VR2
TRISA2
CCP1IE
BRGH
Bit 2
—
PS1
DC
TRISA1
TRISB1
INTF
TMR2IE
POR
TRMT
WR
VR1
Bit 1
PS0
C
TRISA0
TRISB0
RBIF
TMR1IE
BOD
TX9D
RD
VR0
1999 Microchip Technology Inc.
Bit 0
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
11-1 1111
1111 1111
---0 0000
0000 000x
0000 -000
---- 1-0x
11111111
0000 -010
0000 0000
xxxx xxxx
xxxx xxxx
---- x000
--------
000- 0000
Value on
Reset
POR
—
—
—
—
—
—
—
—
—
—
—
—
xxxx xxxx
1111 1111
0000 0000
000q quuu
uuuu uuuu
11-1 1111
1111 1111
---0 0000
0000 000u
0000 -000
---- 1-uq
11111111
0000 -010
0000 0000
uuuu uuuu
uuuu uuuu
---- q000
--------
000- 0000
Value on
all other
resets
—
—
—
—
—
—
—
—
—
—
—
—
(1)