SDA9380 Micronas Intermetall GmbH, SDA9380 Datasheet - Page 29
SDA9380
Manufacturer Part Number
SDA9380
Description
Enhanced Deflection Controller And RGB Video Processor (EDDC)
Manufacturer
Micronas Intermetall GmbH
Datasheet
1.SDA9380.pdf
(72 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SDA9380
Manufacturer:
MICRONAS
Quantity:
20 000
Company:
Part Number:
SDA9380GEG
Manufacturer:
SMK
Quantity:
382
SDA 9380 - B21
The PLL control byte 0 includes the following bits:
The PLL control byte 1 includes the following bits:
Micronas
-INCR4..0:
-GENMOD: Clock generator mode
-VCR:
0
0
Internal default value:
Default value read by IIC bus: INCR = 0
Application
PAL (50Hz)
NTSC (60Hz)
PAL (60Hz)
PAL (100Hz)
NTSC (120Hz)
ATV
MUSE
Macintosh
(640*480*67Hz)
SVGA
(800*600*60Hz)
0
(for typical values see table below)
specified range:6 INCR
(FQ=24.576MHz)
0
Nominal PLL output frequency
INCR=INT((FH*55296)/FQ-64.625)
0: normal PLL mode
1: generator mode (fixed frequency output, controlled by INCR..)
PLL filter optimized for
0: TV mode
1: VCR mode
X
0
FH[Hz]
15625
15750
18750
31250
31500
32400
33750
35000
38000
GENMOD
INCR4
INCR = 6
INCR = 6
INCR = 20
5-21
INCR3
VCR
INCR
if FH1_2 = High
if FH1_2 = Low, SSD = Low
if FH1_2 = Low, SSD = High
20
11
14
21
6
6
6
6
8
NOISY
INCR2
VCR
Preliminary Data Sheet
HSWMI
FH1_2
INCR1
High
High
High
High
High
High
Low
Low
Low
System description
TC_3RD
INCR0
2001-05-03