MD3331-D32-V3Q18 M-Systems Inc., MD3331-D32-V3Q18 Datasheet - Page 62

• Manufacturer Part Number: MD3331-D32-V3Q18
• Description: Mobile Diskonchip Plus 128Mbits 1.8V I/o
• Manufacturer: M-Systems Inc.

10.4.5 Power-Up Timing
Mobile DiskOnChip Plus is reset by assertion of the RSTIN# input. When this signal is negated, DiskOnChip
initiates a download procedure from the flash memory into the internal Programmable Boot Block. During this
procedure, Mobile DiskOnChip Plus does not respond to read or write accesses.
Host systems must therefore observe the requirements described below for first access to Mobile DiskOnChip Plus.
Any of the following methods may be employed to guarantee first-access timing requirements:
Host systems that boot from Mobile DiskOnChip Plus must employ option c), or use another method to guarantee
the required timing for first-time access.
62
(Muxed Mode Only)
a.
b. Poll the state of the BUSY# output.
c.
CE#, OE#, WE#
D (Read cycle)
Use a software loop to wait at least Tp (BUSY1) before accessing the device after the reset signal is
negated.
Use the BUSY# output to hold the host CPU in wait state before completing the first access.
A[12:0], BHE#
VCCQ = 1.65 or 2.5V
VCC = 2.5V
RSTIN#
BUSY#
AVD#
VCC
T
P
(VCC-BUSY0)
T
REC
T
HO
(VCC-RSTIN)
(RSTIN-AVD)
Figure 24: Reset Timing
Data Sheet, Rev. 1.7
T
SU
(D-BUSY1)
T
P
(BUSY1)
VALID
T
Mobile DiskOnChip Plus 16/32MByte 1.8V I/O
HO
T
HO
(BUSY-CS)
(BUSY-A)
T
P
(BUSY0)
T
95-SR-000-10-8L
W
(RSTIN)