MD3331-D32-V3Q18 M-Systems Inc., MD3331-D32-V3Q18 Datasheet - Page 34

• Manufacturer Part Number: MD3331-D32-V3Q18
• Description: Mobile Diskonchip Plus 128Mbits 1.8V I/o
• Manufacturer: M-Systems Inc.

7.7
Description:
Address (hex):
Type:
Reset Value:
7.8
Description:
Address (hex):
Type:
Reset Value:
34
Bit No.
Bit No.
IF_CFG
0-3, 6
Bit 7
Bit 7
0-1
2-7
4-5
7
Device ID Select Register
Configuration Register
ID[1:0] (Identification). The device whose ID input balls matches the value of bits ID[0:1] responds
to read and write cycles to register space.
Reserved for future use
Reserved for future use
MAX_ID (Maximum Device ID). This field controls the RAM address mapping when multiple
devices are used in a cascaded configuration, using the ID[1:0] inputs. It should be programmed to
the highest ID value that is found by software in order to map all available boot blocks into usable
address space.
IF_CFG (Interface Configuration). Reflects the state of the IF_CFG input pin.
In a cascaded configuration, this register controls which device provides the register space. The
value of bits ID[0:1] is compared to the value of the ID configuration input balls, as defined in
Section 9.6. The device whose ID input balls matches the value of bits ID[0:1] responds to read
and write cycles to register space.
1008
Read/Write
00H
This register indicates the current configuration of the device. Unless otherwise noted, the bits are
reset only by a hardware reset, and not upon boot detection or any other entry to Reset mode.
100A
Read/Write (except bit 7, which is Read Only)
X0000X10
RFU_0
Bit 6
Bit 6
Bit 5
Bit 5
MAX_ID
RFU_0
Data Sheet, Rev. 1.7
Bit 4
Bit 4
Description
Description
Bit 3
Bit 3
RFU
Mobile DiskOnChip Plus 16/32MByte 1.8V I/O
Bit 2
Bit 2
Bit 1
Bit 1
RFU_0
ID[1:0]
95-SR-000-10-8L
Bit 0
Bit 0