LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 124
LPC47M112
Manufacturer Part Number
LPC47M112
Description
ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M112.pdf
(208 pages)
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Enhanced Super I/O Controller with LPC Interface
Datasheet
The LPC47M112 provides LED functionality on two GPIOs, GP60 and GP61. These pins can be configured to turn
the LED on and off and blink independent of each other through the LED1 and LED2 runtime registers at offset 0x5D
and 0x5E from the base address located in the primary base I/O address in Logical Device A.
The LED pins (GP60 and GP61) are able to control the LED while the part is under VTR power with VCC removed.
In order to control a LED while the part is under VTR power, the GPIO pin must be configured for the LED function
and either open drain or push-pull buffer type. In the case of open-drain buffer type, the pin is capable of sinking
current to control the LED. In the case of push-pull buffer type, the part will source current. The part is also able to
blink the LED under VTR power. The LED will not blink under VTR power (VCC removed) if the external 32kHz clock
is not connected.
The LED pins can drive a LED when the buffer type is configured to be push-pull and the part is powered by either
VCC or VTR, since the buffers for these pins are powered by VTR. This means they will source their specified current
from VTR even when VCC is present.
The LED control registers are defined in the “Runtime Register” section.
SMSC DS – LPC47M112
Page 124
Rev. 02/02/2005
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