LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 118
LPC47M112
Manufacturer Part Number
LPC47M112
Description
ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M112.pdf
(208 pages)
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Enhanced Super I/O Controller with LPC Interface
Datasheet
Description
Each GPIO port has a 1-bit data register and an 8-bit configuration control register. The data register for each GPIO
port is represented as a bit in one of the 8-bit GPIO DATA Registers, GP1 to GP6. The bits in these registers reflect
the value of the associated GPIO pin as follows. Pin is an input: The bit is the value of the GPIO pin. Pin is an
output: The value written to the bit goes to the GPIO pin. Latched on read and write. All of the GPIO registers are
located in the PME block see Run Time Register section.
configuration state register addresses are listed in Table 55.
SMSC DS – LPC47M112
/QFP
PIN
NO.
N/A
51
52
54
55
61
62
63
64
32
33
34
35
36
37
38
39
41
42
43
45
46
47
50
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Reserved
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Infrared
Rx
Infrared Tx
GPIO
GPIO
FUNCTION
DEFAULT
Joystick 1
Button 1
Joystick 1
Button 2
Joystick 2
Button 1
Joystick 2
Button 2
Joystick 1 X-
Axis
Joystick 1 Y-
Axis
Joystick 2 X-
Axis
Joystick 2 Y-
Axis
P17
P16
P12
System
Option
MIDI_IN
MIDI_OUT
SMI Output
Fan
Tachometer
2
Fan
Tachometer
1
Fan Speed
Control 2
Fan Speed
Control 1
GPIO
GPIO
Keyboard
Reset
Gate A20
FUNC. 1
Table 53 - General Purpose I/O Port Assignments
ALT.
FUNC. 2
ALT.
EETI
EETI
Page 118
FUNC. 3
ALT.
The GPIO ports with their alternate functions and
REGISTER
DATA
GP1
GP2
GP3
1
REGISTER BIT
DATA
NO.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
REGISTER
OFFSET
(HEX)
4B
4C
4D
Rev. 02/02/2005
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