WM8711BL Wolfson Microelectronics, WM8711BL Datasheet - Page 34

• Manufacturer Part Number: WM8711BL
• Description: Ultra-Small Audio DAC
• Manufacturer: Wolfson Microelectronics

WM8711BL
Table 22 Mapping of Program Registers
w
REGISTER MAP
R2 (04h)
R3 (06h)
R4 (08h)
R5 (0Ah)
R6 (0Ch)
R7 (0Eh)
R8 (10h)
R9 (12h)
R15(1Eh)
REGISTER
15
B
0
0
0
0
0
0
0
0
0
14
B
0
0
0
0
0
0
0
0
0
13
B
0
0
0
0
0
0
0
0
0
ADDRESS
The complete register map is shown in Table 23. The detailed description can be found in the
relevant text of the device description. There are 8 registers with 9 bits per register. These can be
controlled using either the 2 wire or 3 wire MPU interface.
0000010
Left Headphone
Out
12
0
0
0
0
0
0
1
1
1
B
REGISTER
ADDRESS
11
0
0
1
1
1
1
0
0
1
B
10
1
1
0
0
1
1
0
0
1
B
0
1
0
1
0
1
0
1
1
B
9
6:0
7
8
BIT
BOTH
BOTH
LRHP
RLHP
B8
0
0
0
0
0
0
LHPVOL
[6:0]
LZCEN
LRHPBOTH
POWER
RZCEN
LZCEN
BCLK
CLK0
DIV2
OFF
LABEL
INV
B7
0
0
0
OUTPD
CLKI
DIV2
CLK
MS
B6
0
0
0
1111001
( 0dB )
0
0
DEFAULT
LR SWAP
OSCPD
B5
0
0
0
DAC SEL BYPASS
OUTPD
RESET
DATA
LRP
B4
0
0
Left Channel Headphone Output
Volume Control
1111111 = +6dB
. . 1dB steps down to
0110000 = -73dB
0000000 to 0101111 = MUTE
Left Channel Zero Cross detect Enable
1 = Enable
0 = Disable
Left to Right Channel Headphone
Volume, Mute and Zero Cross Data
Load Control
1 = Enable Simultaneous Load of
LHPVOL[6:0] and LZCEN to
RHPVOL[6:0] and RZCEN
0 = Disable Simultaneous Load
SR
DAC MU
DACPD
RHPVOL
LHPVOL
B3
0
IWL
DESCRIPTION
B2
0
0
1
PD, Rev 4.1, April 2007
DEEMPH
BOSR
Production Data
B1
0
1
0
FORMAT
ACTIVE
NORM
USB/
B0
0
0
1
34