WM8711BL Wolfson Microelectronics, WM8711BL Datasheet
WM8711BL
Related parts for WM8711BL
WM8711BL Summary of contents
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... Ultra-Small Audio DAC with Headphone Amplifier DESCRIPTION The WM8711BL is an ultra-small, low power stereo DAC with an integrated headphone driver designed specifically for portable audio systems requiring hi-fi stereo playback through headphones. Stereo 24-bit multi-bit sigma delta DACs are used with oversampling digital interpolation filters. Digital audio input word lengths from 16-32 bits and sampling rates from 8kHz to 96kHz are supported ...
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... WM8711BL DESCRIPTION .......................................................................................................1 FEATURES ............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY .....................................................................................................7 POWER CONSUMPTION ......................................................................................8 HEADPHONE SNR VS AVDD ...............................................................................9 ANALOGUE SUPPLY CURRENT VS AVDD.........................................................9 DIGITAL AUDIO INTERFACE – MASTER MODE........................................................ 10 DIGITAL AUDIO INTERFACE – SLAVE MODE ........................................................... 11 MPU INTERFACE TIMING ...
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... TEMPERATURE DEVICE RANGE o WM8711BLGEFL/V - WM8711BLGEFL/RV - Note: Reel quantity = 3500 w MOISTURE SENSITIVITY AVDD RANGE PACKAGE 24-lead QFN 1.8 to 3.6V (Pb-free) 24-lead QFN 1.8 to 3.6V (Pb-free, tape and reel) WM8711BL PEAK SOLDERING LEVEL TEMPERATURE o MSL3 260 C o MSL3 260 C PD, Rev 4.1, April 2007 3 ...
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... WM8711BL PIN DESCRIPTION PIN NAME 1 XTI/MCLK 2 XTO 3 DCVDD 4 DGND 5 DBVDD 6 CLKOUT 7 BCLK 8 DACDAT 9 DACLRC 10 HPVDD 11 LHPOUT 12 RHPOUT 13 HPGND 14 LOUT 15 ROUT 16 AVDD 17 AGND 18 VMID 19 RLINEIN 20 LLINEIN 21 MODE 22 CSB 23 SDIN 24 SCLK Note: 1. Pull Up/Down only present when Control Register Interface ACTIVE=0 to conserve power. ...
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... DCVDD must always be less than or equal to DBVDD RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range (Core) Digital supply range (Buffer) Analogue supply range Ground DGND,AGND,HPGND w SYMBOL TEST CONDITIONS DCVDD DBVDD AVDD, HPVDD WM8711BL MIN MAX -0.3V +3.63V -0.3V +3.63V DGND -0.3V DVDD +0.3V AGND -0.3V AVDD +0.3V -25°C +85°C -65°C +150° ...
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... WM8711BL ELECTRICAL CHARACTERISTICS Test Conditions AVDD, HPVDD, DBVDD = 1.8V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T unless otherwise stated. PARAMETER Digital Logic Levels (CMOS Levels) Input LOW level Input HIGH level Output LOW Output HIGH Power On Reset Threshold (DCVDD) DCVDD Threshold On -> Off Hysteresis DCVDD Threshold Off -> On ...
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... THD AVDD=HPVDD=3.3V, 1kHz 32Ω 14mW rms O AVDD=HPVDD=1.8V, 1kHz 32Ω 4.5mW rms O PSRR 1kHz 100mVpp 20Hz to 20kHz 100mVpp 1kHz 1kHz 1kHz, 0dB WM8711BL o = +25 C, Slave Mode 48kHz, MCLK = 256fs A MIN TYP MAX AVDD/3 0.07 -63 0.05 0.18 -66 -55 50 ...
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... WM8711BL POWER CONSUMPTION MODE DESCRIPTION DAC Playback (USB 0 0 master mode), oscillator and CLKOUT enabled, MCLK=12MHz, fs=48kHz DAC Playback (slave 0 1 mode using external 12.288 MCLK), fs=48kHz Standby clocks Power Down clocks Table 1 Current Consumption Examples Notes + 48kHz ...
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... DCVDD=1.5V; DBVDD=1.8V; Load=32Ohm; fs=44.1kHz; Output=-5dBFS (sine) SNR vs AVDD (DAC Playback to Headphone 1.5 2 ANALOGUE SUPPLY CURRENT VS AVDD 24-bit data; DCVDD=1.5V; DBVDD=1.8V; Load=16Ohm; fs=44.1kHz; Output=quiescent Supply Current vs AVDD (DAC Playback to Headphone) 4 3.5 3 2.5 2 1.5 1 1.5 w 2.5 3 AVDD = HPVDD (V) 2 2.5 3 AVDD = HPVDD (V) WM8711BL 3.5 4 3.5 4 PD, Rev 4.1, April 2007 9 ...
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... WM8711BL MASTER CLOCK TIMING MCLK Figure 1 System Clock Timing Requirements Test Conditions AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T CLKDIV2=0 unless otherwise stated. PARAMETER System Clock Timing Information MCLK System clock pulse width high MCLK System clock pulse width low MCLK System clock cycle time MCLK Duty cycle DIGITAL AUDIO INTERFACE – ...
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... TEST CONDITIONS t BCY t BCH t BCL t LRSU t LRH CSL t SCY t t SCH SCL t t DSU DHO WM8711BL o = +25 C, slave mode 48kHz, MCLK = 256fs A MIN TYP MAX CSH t CSS t SCS LSB PD, Rev 4.1, April 2007 UNIT ...
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... WM8711BL Test Conditions AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, T unless otherwise stated. PARAMETER Program Register Input Information SCLK rising edge to CSB rising edge SCLK pulse cycle time SCLK pulse width low SCLK pulse width high SDIN to SCLK set-up time SCLK to SDIN hold time ...
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... Production Data DEVICE DESCRIPTION INTRODUCTION The WM8711BL is a low power audio DAC designed specifically for portable audio products. Its features, performance and low power consumption make it ideal for portable MP3, CD and mini-disc players. The WM8711BL includes line and headphone outputs from the on-board DAC, configurable digital audio interface and a choice wire MPU control interface ...
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... WM8711BL AUDIO SIGNAL PATH DAC FILTERS The DAC filters perform true 24 bit signal processing to convert the incoming digital audio data from the digital audio interface at the specified sample rate to multi-bit oversampled data for processing by the analogue DAC. Figure 6 illustrates the DAC digital filter path. ...
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... Production Data The WM8711BL employs a multi-bit sigma delta oversampling digital to analogue converter. The scheme for the converter is illustrated in Figure 7. Figure 7 Multi-Bit Oversampling Sigma Delta Schematic The DAC converts the multi-level digital audio data stream from the DAC digital filters into high quality analogue audio ...
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... HEADPHONE AMPLIFIER The WM8711BL has a stereo headphone output available on LHPOUT and RHPOUT. The output is designed specifically for driving ohm headphones with maximum efficiency and low power consumption. The headphone output includes a high quality volume level adjustment and mute function ...
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... This is achieved through writing to the HPBOTH bit of the control register. Setting LRHPBOTH whilst writing to LHPVOL and LZCEN will simultaneously update the Right Headphone controls similarly. The corresponding effect on updating RLHPBOTH is also achieved. w VMID WM8711BL HPOUT PD, Rev 4.1, April 2007 17 ...
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... WM8711BL The software control is given in Table 4. REGISTER ADDRESS 0000010 Left Headphone Out 0000011 Right Headphone Out Table 4 Headphone Output Software Control w BIT LABEL DEFAULT 6:0 LHPVOL[6:0] 1111001 ( 0dB ) 7 LZCEN 0 8 LRHPBOTH 0 6:0 RHPVOL[7:0] 1111001 ( 0dB ) 7 RZCEN 0 8 RLHPBOTH 0 Production Data DESCRIPTION Left Channel Headphone Output ...
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... DEVICE OPERATION DEVICE RESETTING The WM8711BL contains a power on reset circuit that resets the internal state of the device to a known condition. The power on reset is applied as DCVDD powers on and released only after the voltage level of DCVDD crosses a minimum turn off threshold. If DCVDD later falls below a minimum turn on threshold voltage then the power on reset is re-applied ...
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... Note that in this situation, the oscillator circuit of the WM8711BL can be safely powered down to conserve power (see POWER DOWN section) CORE CLOCK The WM8711BL DSP core can be clocked either by MCLK or MCLK divided by 2. This is controlled by software as shown in Table 6 below. REGISTER ...
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... Electrical Characteristics. CLKOUT can also be divided by 2 under software control, refer to Table 7. Note that if CLKOUT is not required then the CLKOUT buffer on the WM8711BL can be safely powered down to conserve power (see POWER DOWN section). If the system architect has the choice between using F ...
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... WM8711BL There are four digital audio interface formats accommodated by the WM8711BL. These are shown in the figures below. Refer to the Electrical Characteristic section for timing information. Left Justified mode is where the MSB is available on the first rising edge of BCLK following a DACLRC transition. DACLRC ...
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... Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the right channel data and the next sample. Figure 16 DSP/PCM Mode Audio Interface (mode A, LRP=1) w 1/fs LEFT CHANNEL n-2 n-1 LSB WM8711BL RIGHT CHANNEL n-2 n-1 MSB LSB st nd ...
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... The length of the digital audio data is programmable at 16/20/ bits. Refer to the software control table below. The data is signed 2’s complement. The DAC digital filters process data using 24 bits. If the DAC is programmed to receive bit data, the WM8711BL packs the LSBs with zeros. If the DAC is programmed to receive 32 bit data, then it strips the LSBs. ...
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... To accommodate system timing requirements the interpretation of BCLK maybe inverted, this is controlled via the software shown in Table 8. This is especially appropriate for DSP mode. REGISTER ADDRESS 0000111 Digital Audio Interface Format Table 8 Digital Audio Interface Control Note: If right justified 32 bit mode is selected then the WM8711BL defaults to 24 bits. w BIT LABEL DEFAULT 1:0 FORMAT[1:0] 10 ...
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... WM8711BL MASTER AND SLAVE MODE OPERATION The WM8711BL can be configured as either a master or slave mode device master mode device the WM8711BL controls sequencing of the data and clocks on the digital audio interface slave device the WM8711BL responds with data to the clocks it receives over the digital audio interface ...
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... It is called USB mode since the common USB (Universal Serial Bus) clock is at 12MHz and the WM8711BL can be directly used within such systems. WM8711BL can generate all the normal audio sample rates from this one Master Clock frequency, removing the need for different master clocks or PLL circuits ...
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... All other combinations of BOSR and SR[3:0] that are not in the truth table are invalid The BOSR bit represents the base over-sampling rate. This is the rate that the WM8711BL digital signal processing is carried out at. In Normal mode, with BOSR = 0, the base over-sampling rate is at 256fs, with BOSR = 1, the base over-sampling rate is at 384fs ...
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... All other combinations of BOSR and SR[3:0] that are not in the truth table are invalid The BOSR bit represents the base over-sampling rate. This is the rate that the WM8711BL digital signal processing is carried out at and the sampling rate will always be a sub-multiple of this. In USB mode, with BOSR = 0, the base over-sampling rate is defined at 250Fs, with BOSR = 1, the base over-sampling rate is defined at 272Fs ...
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... WM8711BL The exact sample rates supported for all combinations are defined by the relationships in Table 15 below. TARGET SAMPLING RATE kHz 8 32 44.1 48 88.2 96 Table 15 USB Mode Actual Sample Rates ACTIVATING DSP AND DIGITAL AUDIO INTERFACE To prevent any communication problems from arising across the Digital Audio Interface is disabled (tristate with weak 100k pulldown) at power on ...
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... WM8711BL will respond by pulling SDIN low on the next clock pulse (ACK). The WM8711BL is a write only device and will only respond to the R/W bit indicating a write. If the address is not recognised the device will return to the idle condition and wait for a new start condition and valid address ...
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... After receiving a complete address and data sequence the WM8711BL returns to the idle state and waits for another start condition. Each write to a register requires the complete sequence of start condition, device address and R/W bit followed by the 16 register address and data bits ...
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... STANDBY, Crystal oscillator and CLKOUT not-available DESCRIPTION POWEROFF, but with Crystal Oscillator OS and CLKOUT available POWEROFF, but with Crystal Oscillator OS available, CLKOUT not-available POWEROFF, Crystal oscillator and CLKOUT not-available. WM8711BL PD, Rev 4.1, April 2007 33 ...
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... WM8711BL REGISTER MAP The complete register map is shown in Table 23. The detailed description can be found in the relevant text of the device description. There are 8 registers with 9 bits per register. These can be controlled using either the 2 wire or 3 wire MPU interface. REGISTER ...
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... OUTPD 1 5 OSCPD 0 6 CLKOUTPD 0 7 POWEROFF 1 WM8711BL DESCRIPTION Right Channel Headphone Output Volume Control 1111111 = +6dB . . 1dB steps down to 0110000 = -73dB 0000000 to 0101111 = MUTE Right Channel Zero Cross detect Enable 1 = Enable 0 = Disable Right to Left Channel Headphone Volume, Mute and Zero Cross Data ...
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... WM8711BL REGISTER ADDRESS 0000111 Digital Audio Interface Format w BIT LABEL DEFAULT 1:0 FORMAT[1:0] 10 3:2 IWL[1: LRP 0 5 LRSWAP BCLKINV 0 Production Data DESCRIPTION Audio Data Format Select 11 = DSP Mode, frame sync + 2 data packed words 10 = I2S Format, MSB-First left-1 justified 01 = MSB-First, left justified ...
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... ACTIVE 0 8:0 RESET not reset PARAMETER TEST CONDITIONS +/- 0.03dB -6dB f > 0.584fs +/- 0.03dB -6dB f > 0.5465fs WM8711BL DEFAULT DESCRIPTION Mode Select 1 = USB mode (250/272fs Normal mode (256/384fs) Base Over-Sampling Rate USB Mode 0 = 250fs 1 = 272fs DAC sample rate Normal Mode control 256fs See USB Mode ...
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... WM8711BL DAC FILTER RESPONSES 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 22 DAC Digital Filter Frequency Response–Type 0 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 24 DAC Digital Filter Frequency Response–Type 1 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 26 DAC Digital Filter Frequency Response–Type ...
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... Production Data 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 28 DAC Digital Filter Frequency Response–Type 3 w 0.05 0 -0.05 -0.1 -0.15 -0.2 -0. Figure 29 DAC Digital Filter Ripple–Type 3 WM8711BL 0.05 0.1 0.15 0.2 Frequency (Fs) PD, Rev 4.1, April 2007 0.25 39 ...
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... WM8711BL DIGITAL DE-EMPHASIS CHARACTERISTICS -10 0 2000 4000 6000 8000 Frequency (Fs) Figure 30 De-Emphasis Frequency Response (32kHz -10 0 5000 10000 Frequency (Fs) Figure 32 De-Emphasis Frequency Response (44.1kHz -10 0 5000 10000 Frequency (Fs) Figure 34 De-Emphasis Frequency Response (48kHz) w 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 10000 ...
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... F DGND 0.1 µ F DCVDD LLINEIN VREF RLINEIN VREF WM8711BL DAC DACLRC DACDAT BCLK MODE CSB SDIN SCLK XTI/MCLK XTO WM8711BL 3.3V AVDD + 0.1 µ µ F AGND 3.3V HPVDD + 10 µ F 0.1µ F HPGND + 100Ω LOUT 1 µ F 47k Ω + 100Ω ROUT 1 µ F 47kΩ ...
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... WM8711BL PACKAGE DIMENSIONS – QFN w Production Data PD, Rev 4.1, April 2007 42 ...
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... Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS: Wolfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w WM8711BL Wolfson is PD, Rev 4.1, April 2007 43 ...