WM8711BL Wolfson Microelectronics, WM8711BL Datasheet - Page 25

• Manufacturer Part Number: WM8711BL
• Description: Ultra-Small Audio DAC
• Manufacturer: Wolfson Microelectronics

Production Data
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To accommodate system timing requirements the interpretation of BCLK maybe inverted, this is
controlled via the software shown in Table 8. This is especially appropriate for DSP mode.
Table 8 Digital Audio Interface Control
Note: If right justified 32 bit mode is selected then the WM8711BL defaults to 24 bits.
0000111
Digital Audio
Interface Format
REGISTER
ADDRESS
1:0
3:2
4
5
6
7
BIT
FORMAT[1:0]
IWL[1:0]
LRP
LRSWAP
MS
BCLKINV
LABEL
10
10
0
0
0
0
DEFAULT
Audio Data Format Select
11 = DSP Mode, frame sync + 2 data
packed words
10 = I
justified
01 = MSB-First, left justified
00 = MSB-First, right justified
Input Audio Data Bit Length Select
11 = 32 bits
10 = 24 bits
01 = 20 bits
00 = 16 bits
DACLRC phase control (in left, right
or I
1 = Right Channel DAC data when
DACLRC high
0 = Right Channel DAC data when
DACLRC low
(opposite phasing in I
or
DSP mode A/B select ( in DSP mode
only)
1 = MSB is available on 2
rising edge after DACLRC rising
edge
0 = MSB is available on 1st BCLK
rising edge after DACLRC rising
edge
DAC Left Right Clock Swap
1 = Right Channel DAC Data Left
0 = Right Channel DAC Data Right
Master Slave Mode Control
1 = Enable Master Mode
0 = Enable Slave Mode
Bit Clock Invert
1 = Invert BCLK
0 = Don’t invert BCLK
2
S modes)
2
S Format, MSB-First left-1
DESCRIPTION
PD, Rev 4.1, April 2007
2
S mode)
WM8711BL
nd
BCLK
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