nRF24E2 Nordic VLSI, nRF24E2 Datasheet - Page 15

• Manufacturer Part Number: nRF24E2
• Description: Single Chip RF Transmitter + MCU + ADC NRF2402 2.4GHz RF Transmitter
• Manufacturer: Nordic VLSI

PRODUCT SPECIFICATION
When SPI_CTRL is 01, the port is used as a SPI master port. The GPIO bits in port P0
may be used as chip select(s). For timing diagram, please see Figure 3-1 : SPI
interface timing.
When not used as SPI port, P0_ALT.0 will force P1.0 to be the timer T2 input, P1.1 is
now a GPIO. When P0_ALT.0 is 0, also P1.0 is a GPIO.
P1.2 (DIN0) is always an input.
P1.0
(DIO0)
P1.1
(DIO1)
P1.2
(DIN0)
Table 3-4 : Port 1 (P1) functions
Port 1 is controlled by SFR-registers 0x90, 0x96 and 0x97, and only the 3 lower bits
of the registers are used.
Table 3-5 : Port 1 control and data SFR-registers
3
function for this pin.
Nordic VLSI ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone [phone] - Fax [phone]
Revision: 1.0
P1.1 is actually under control of P1_DIR.1 even when P1_ALT.1 is 1, since there is no alternate
90
96
97
R/W
R/W
R/W
SCK
SDO
SDI
3
3
3
Out
Out
In
FF
FF
00
T2
P1.1
P1.2
P1
P1_DIR
P1_ALT
Qhtrà $ÂsÃ(
In
In
In
3
Port 1, pins DIN0, DIO1 and DIO0
Select alternate functions for each pin of P1
Direction for each bit of Port 1
0: Output, 1: Input
Direction is overridden if alternate function
is selected for a pin, or if SPI_CTRL=01.
bit0, DIN0 is always input.
if corresponding bit in P1_ALT is set, as
listed in Table 3-4 : Port 1 (P1) functions
If SPI_CTRL is ‘01’, the P1 port is used as
SPI master data and clock :
2 -> SDI – input to nRF24E2 from slave
1 -> SDO – output from nRF24E2 to slave
0 -> SCK – output from nRF24E2 to slave
P1.0
P1.1
P1.2
In
In
In
P1.0
P1.1
P1.2
August 2003
Out
Out
In