nRF24E2 Nordic VLSI, nRF24E2 Datasheet - Page 13

• Manufacturer Part Number: nRF24E2
• Description: Single Chip RF Transmitter + MCU + ADC NRF2402 2.4GHz RF Transmitter
• Manufacturer: Nordic VLSI

PRODUCT SPECIFICATION
The nRF24E2 have two IO ports located at the default locations for P0 and P1 in
standard 8051, but the ports are fully bi-directional CMOS and the direction of each
pin is controlled by a _DIR and an _ALT bit for each bit as shown in the table below.
Table 3-1 : Port functions
During the period the internal reset is active (regardless of whether or not the clock is
running), all the port pins are configured as inputs. When program execution starts,
the DIO ports are still configured as inputs and the program will need to set the _ALT
and/or the _DIR register for the pins that should be used as outputs.
P0_ALT and P0_DIR control the P0 port function in that order of priority. If the
alternate function for port p0.n is set (by P0_ALT.n = 1) the pin will be input or
output as required by the alternate function (UART, external interrupt, timer inputs or
PWM output), except that the UART RXD direction will still depend on P0_DIR.1.
To use INT0_N or INT1_N, the corresponding alternate function must be activated,
P0_ALT.3 / P0_ALT.4
When the P0_ALT.n is not set, bit ‘n’ of the port is a GPIO function with the direction
controlled by P0_DIR.n.
P0.0 is always a GPIO. It will be activated by the default boot loader after reset and
should be connected to the CSN of the boot flash.
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Nordic VLSI ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone [phone] - Fax [phone]
Revision: 1.0
Pin
DIN0
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIO6
DIO7
DIO8
DIO9
Reserved for use as EEPROM_CSN, works as GPIO P0.0 independent of the “Alternate setting”
Default function
P1.2
P1.0
P1.1
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
2
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T2 (timer2 input)
EEPROM_CSN
RXD (UART)
TXD (UART)
INT0_N
(interrupt)
INT1_N
(interrupt)
T0 (timer0 input)
T1 (timer1 input)
PWM
Alternate=1
SPI_DI
SPI_SCK
SPI_DO
SPI_CTRL=01
August 2003