LPC2292 Philips Semiconductors (Acquired by NXP), LPC2292 Datasheet - Page 33

• Manufacturer Part Number: LPC2292
• Description: 16/32-bit Arm Microcontrollers; 256 KB Isp/iap Flash With CAN, 10-bit ADC And External Memory Interfacebased on a 16/32 Bit ARM7TDMI-STM Cpu With Real-time Emulation And Embedded Trace Support, Together With 256 Kilobytes (kB) of Embedded High Speed
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
Table 13:
[1]
9397 750 12748
Preliminary data
Symbol
t
t
t
t
t
t
t
Write Cycle Parameters
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVDV
AVDV
STHDNV
CSHOEH
OEHANV
CHOEL
CHOEH
AVCSLW
CSLDVW
CSLWEL
CSLBLSL
WELDV
CSLDV
WELWEH
WELWEH
WEHANV
WEHDNV
BLSHANV
BLSHDNV
CHDV
CHWEL
CHHBLSL
AVCSL
AVCSL
AVCSL
Except on initial access, in which case the address is set up t
External memory interface AC characteristics. C
Description
Burst-ROM Initial Memory Access Time
(latest of Address Valid, CS LOW, OE
LOW to Data Valid)
Burst-ROM Subsequent Memory Access
Time (Address Valid to Data Valid)
Data Hold Time (earliest of CS HIGH, OE
HIGH, Address Change to Data Invalid)
CS HIGH to OE HIGH
OE HIGH to Address Invalid
XCLK HIGH to OE LOW
XCLK HIGH to OE HIGH
Address Valid to CS LOW
CS LOW to Data Valid
CS LOW to WE LOW
CS LOW to BLS LOW
WE LOW to Data Valid
CS LOW to Data Valid
WE LOW to WE HIGH
BLS LOW to BLS HIGH
WE HIGH to Address Invalid
WE HIGH to Data Invalid
BLS HIGH to Address Invalid
BLS HIGH to Data Invalid
XCLK HIGH to Data Valid
XCLK HIGH to WE LOW
XCLK HIGH to BLS LOW
XCLK HIGH to WE HIGH
XCLK HIGH to BLS HIGH
XCLK HIGH to Data Invalid
Rev. 01 — 05 February 2004
16/32-bit ARM microcontrollers with external memory interface
CYC
Min
(t
t
0
t
t
t
t
(2
t
(2
-
-
-
-
-
-
CYC
CYC
CYC
CYC
CYC
CYC
earlier.
5
5
5
5
5
5
5
5
5
CYC
L
= 25 pF. T
t
t
+ ( 20)
*(2 + WST1)) + ( 20) -
CYC
CYC
5
5
(1 + WST2)
(1 + WST2)
10
) 5
) 5
[1]
amb
= 40 C
LPC2292/LPC2294
5
5
…continued
Max
-
-
5
5
5
5
-
5
5
5
5
5
t
t
t
(2
t
(2
10
10
10
10
10
10
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CYC
CYC
CYC
CYC
*(1 + WST2) + 5
*(1 + WST2) + 5
t
t
+ 5
+ 5
CYC
CYC
) + 5
) + 5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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