LPC2292 Philips Semiconductors (Acquired by NXP), LPC2292 Datasheet - Page 25

• Manufacturer Part Number: LPC2292
• Description: 16/32-bit Arm Microcontrollers; 256 KB Isp/iap Flash With CAN, 10-bit ADC And External Memory Interfacebased on a 16/32 Bit ARM7TDMI-STM Cpu With Real-time Emulation And Embedded Trace Support, Together With 256 Kilobytes (kB) of Embedded High Speed
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
9397 750 12748
Preliminary data
6.21.2 PLL
6.21.3 Reset and wake-up timer
6.21.4 External interrupt inputs
The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The
input frequency is multiplied up into the range of 10 MHz to 60 MHz with a Current
Controlled Oscillator (CCO). The multiplier can be an integer value from 1 to 32 (in
practice, the multiplier value cannot be higher than 6 on this family of microcontrollers
due to the upper frequency limit of the CPU). The CCO operates in the range of
156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO
within its frequency range while the PLL is providing the desired output frequency.
The output divider may be set to divide by 2, 4, 8, or 16 to produce the output clock.
Since the minimum output divider value is 2, it is insured that the PLL output has a
50% duty cycle.The PLL is turned off and bypassed following a chip Reset and may
be enabled by software. The program must configure and activate the PLL, wait for
the PLL to Lock, then connect to the PLL as a clock source.
Reset has two sources on the LPC2292/LPC2294: the RESET pin and Watchdog
Reset. The RESET pin is a Schmitt trigger input pin with an additional glitch filter.
Assertion of chip Reset by any source starts the Wake-up Timer (see Wake-up Timer
description below), causing the internal chip reset to remain asserted until the
external Reset is de-asserted, the oscillator is running, a fixed number of clocks have
passed, and the on-chip Flash controller has completed its initialization.
When the internal Reset is removed, the processor begins executing at address 0,
which is the Reset vector. At that point, all of the processor and peripheral registers
have been initialized to predetermined values.
The wake-up timer ensures that the oscillator and other analog functions required for
chip operation are fully functional before the processor is allowed to execute
instructions. This is important at power on, all types of Reset, and whenever any of
the aforementioned functions are turned off for any reason. Since the oscillator and
other functions are turned off during Power-down mode, any wake-up of the
processor from Power-down mode makes use of the Wake-up Timer.
The Wake-up Timer monitors the crystal oscillator as the means of checking whether
it is safe to begin code execution. When power is applied to the chip, or some event
caused the chip to exit Power-down mode, some time is required for the oscillator to
produce a signal of sufficient amplitude to drive the clock logic. The amount of time
depends on many factors, including the rate of V
the type of crystal and its electrical characteristics (if a quartz crystal is used), as well
as any other external circuitry (e.g. capacitors), and the characteristics of the
oscillator itself under the existing ambient conditions.
The LPC2292/LPC2294 include up to nine edge or level sensitive External Interrupt
Inputs as selectable pin functions. When the pins are combined, external events can
be processed as four independent interrupt signals. The External Interrupt Inputs can
optionally be used to wake up the processor from Power-down mode.
Rev. 01 — 05 February 2004
16/32-bit ARM microcontrollers with external memory interface
LPC2292/LPC2294
DD
ramp (in the case of power on),
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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