LPC2292 Philips Semiconductors (Acquired by NXP), LPC2292 Datasheet - Page 24

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LPC2292

Manufacturer Part Number
LPC2292
Description
16/32-bit Arm Microcontrollers; 256 KB Isp/iap Flash With CAN, 10-bit ADC And External Memory Interfacebased on a 16/32 Bit ARM7TDMI-STM Cpu With Real-time Emulation And Embedded Trace Support, Together With 256 Kilobytes (kB) of Embedded High Speed
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet

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Philips Semiconductors
9397 750 12748
Preliminary data
6.20.1 Features
6.21.1 Crystal oscillator
6.21 System control
Three match registers can be used to provide a PWM output with both edges
controlled. Again, the MR0 match register controls the PWM cycle rate. The other
match registers control the two PWM edge positions. Additional double edge
controlled PWM outputs require only two match registers each, since the repetition
rate is the same for all PWM outputs.
With double edge controlled PWM outputs, specific match registers control the rising
and falling edge of the output. This allows both positive going PWM pulses (when the
rising edge occurs prior to the falling edge), and negative going PWM pulses (when
the falling edge occurs prior to the rising edge).
The oscillator supports crystals in the range of 1 MHz to 30 MHz. The oscillator
output frequency is called f
as cclk for purposes of rate equations, etc. f
the PLL is running and connected. Refer to
information.
Seven match registers allow up to six single edge controlled or three double edge
controlled PWM outputs, or a mix of both types.
The match registers also allow:
Supports single edge controlled and/or double edge controlled PWM outputs.
Single edge controlled PWM outputs all go HIGH at the beginning of each cycle
unless the output is a constant LOW. Double edge controlled PWM outputs can
have either edge occur at any position within a cycle. This allows for both positive
going and negative going pulses.
Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs
will occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive
going or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation
of erroneous pulses. Software must ‘release’ new match values before they can
become effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Rev. 01 — 05 February 2004
16/32-bit ARM microcontrollers with external memory interface
osc
and the ARM processor clock frequency is referred to
Section 6.21.2 “PLL”
osc
LPC2292/LPC2294
and cclk are the same value unless
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
for additional
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