HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 44

• Manufacturer Part Number: HFC-SUSB
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

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Name
CHIP_ID
STATUS
Name
P_ADR_W
P_DATA
Reading the STATUS register clears no bit.
Auxiliary port registers
Addr.
Addr.
1Ch
16h
1Eh
1Fh
Bits
3..0
7..4
5..2
Bits
7..0
7..0
0
1
6
7
r/w Function
r/w Function
r/w Port data
r
r
r
r
r
r
r
w
unused, '0'
Chip identification
'0100'
BUSY/NOBUSY status
'1' the HFC-S USB is BUSY after initializing reset FIFO,
'0' the HFC-S USB is not busy, all accesses are allowed
processing/non processing status
'1' the HFC-S USB is in processing phase (every 125µs)
'0' the HFC-S USB is not in processing phase
unused, '0'
an interrupt (with enabled mask bit) indicated in the INT_S2
register has occured
FRAME interrupt with enabled mask bit has occured (any data
channel interrupt)
All masked B-, D- and PCM-channel interrupts are "ored" (see
register INT_S1)
Port address write
increment F or change FIFO
HFC-S USB
Cologne
Chip
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