HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 29

• Manufacturer Part Number: HFC-SUSB
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C EC2
3.4
There is a transmit and a receive FIFO with HDLC-controller for each of the two B-channels, for the D-
channel and for the PCM interface in the HFC-S USB. Each FIFO has 128 bytes length in each direction.
Up to 7 frames can be stored in each FIFO.
The HDLC circuits are located on the S/T device side of the HFC-S USB. So always plain data is stored
in the FIFOs. Zero insertion and CRC checksum processing for receive and transmit data is done by the
HFC-S USB automatically.
3.4.1 FIFO endpoints and transfer types
The FIFOs can be accessed by isochronous data transfer (endpoints 5..8) or bulk/interrupt data transfer
(endpoints 1..4). The table below shows how FIFOs can be read/written. Each FIFO has two endpoints:
one for bulk/interrupt data transfer and one for isochronous data transfer. All endpoint numbers are
bidirectional. This means by writing data from the host to an endpoint of the HFC-S USB the transmit
FIFO is accessed. If the host reads data from an endpoint of the HFC-S USB the corresponding receive
FIFO is accessed.
Table 2: FIFO endpoints and transfer types
:e\i " !
Endpoint
1
2
3
4
5
6
7
8
FIFOs
IN / OUT FIFO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
B1-transmit
B1-receive
B2-transmit
B2-receive
D-transmit
D-receive
PCM-transmit
PCM-receive
B1-receive
B2-receive
D-receive
PCM-receive
B1-transmit
B2-transmit
D-transmit
PCM-transmit
FIFO#
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Transfer Type
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Bulk / Interrupt
Isochronous
Isochronous
Isochronous
Isochronous
Isochronous
Isochronous
Isochronous
Isochronous
Cologne
Chip
") _V ("