HFC-SUSB Cologne Chip AG, HFC-SUSB Datasheet - Page 10

• Manufacturer Part Number: HFC-SUSB
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

863 C EC2
2.1.2 S/T interface transmit signals
2.1.3 S/T interface receive signals
2.1.4 PCM bus interface signals
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Pin No.
20
21
22
23
25
28
13
14
15
16
17
30
31
32
33
34
35
internal pull up
R2
LEV_R2
LEV_R1
R1
ADJ_LEV
AWAKE
TX2_HI
/TX1_LO
/TX_EN
/TX2_LO
TX1_HI
C4IO
F0IO
STIO1
STIO2
F1_A
F1_B
Pin Name
Output
Input
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
I
I
I
I
I
u)
u)
u)
u)
Function
GND driver for transmitter 1
Transmit enable
GND driver for transmitter 2
Receive data 2
Receive data 1
4.096 MHz / 8.192 MHz / 16.384 MHz clock
PCM/GCI/IOM2 bus clock master: output
PCM/GCI/IOM2 bus clock slave: input (reset default)
Frame synchronisation, 8kHz pulse for PCM/GCI/IOM2 bus
frame synchronisation
PCM/GCI/IOM2 bus master: output
PCM/GCI/IOM2 bus slave: input (reset default)
PCM/GCI/IOM2 bus data line I
Slotwise programmable as input or output
PCM/GCI/IOM2 bus data line II
Slotwise programmable as input or output
enable signal for external CODEC A or C2IO clock (bit clock)
Programmable as positive (reset default) or negative pulse.
enable signal for external CODEC B
Programmable as positive (reset default) or negative pulse.
Transmit output 2
Transmit output 1
Level detect for R2
Level detect for R1
Levelgenerator
Awake input pin for external awake circuitry
Cologne
Chip
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