AD9927 Analog Devices, AD9927 Datasheet - Page 81

• Manufacturer Part Number: AD9927
• Description: 14-Bit CCD Signal Processor
• Manufacturer: Analog Devices

+3V CP OUTPUT
+1.8V SUPPLY
DATA OUTPUTS
GPO OUTPUT
(SEE POWER-UP
PROCEDURE)
DCLK OUTPUT
0.1µF
14
0.1µF
HORIZONTAL SYNC IN/OUT
(LSB) D0
DRVDD
VERTICAL SYNC IN/OUT
XVVDD
DRVSS
IOVDD
TEST0
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
IOVSS
EXTERNAL RESET IN
V5V
EXTERNAL SYNC IN
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
D8
D7
D6
D5
D4
D3
D2
D1
Figure 96. Crystal Application Using CLI/CLO (Consult Crystal Data Sheet for Component Values)
SERIAL INTERFACE
(FROM ASIC/DSP)
A6
B6
A7
B7
A8
B8
A9
B9
A10
A2
K12
H12
J8
J7
K8
E10
A1
J12
D10
J6
G9
J9
A11
A12
B10
B12
C6
C9
C12
D9
D12
E9
E12
F12
G12
Figure 95. Typical 1.8 V Circuit Configuration Using Charge Pump for HVDD and RGVDD
3
AD9927
5pF ~ 20pF
NOT DRAWN TO SCALE
K7
AD9927BBCZ
CLI
Rev. 0 | Page 81 of 100
24MHz TO 36MHz
XTAL
2MΩ
0Ω ~ 500Ω
18
375Ω
K6
8
XSUBCNT INPUT (FROM GPO OR TIE TO +3V)
VERTICAL OUTPUT (TO CCD)
SUBCK OUTPUT (TO CCD)
GENERAL-PURPOSE OUTPUTS
NOTE: ONE GPO IS NEEDED TO DRIVE V5V (PIN E10) THROUGH DIODE
CLO
5pF ~ 20pF
0.1µF
0.1µF
0.1µF
C10
E11
B11
F10
OPTIONAL CLOCK OSCILLATOR OUTPUT
(FOR CRYSTAL APPLICATION)
MASTER CLOCK INPUT (3V LOGIC)
M6
M4
K1
H2
G1
G2
K2
C2
D2
D1
C1
B2
B1
H1
J2
J1
F2
L8
L4
L5
E2
F1
E1
F9
L6
L7
L1
0.1µF
TCVSS
RGVSS
HVSS1
HVSS2
LDOVSS
CPVSS
CLIVDD
LDOIN
LDO1P8EN
LDOOUT
SENSE
LDO3P2EN
CPCLI
CP1P8
CPFCB
CPFCT
CP3P3
DVDD
TCVDD
RGVDD
H6
H5
H4
H3
H2
H1
AVSS
DVSS
AVDD
HVDD1
HVDD2
0.1µF
0.1µF
25V
0.1µF
10V
0.1µF
0.1µF
0.1µF
ANALOG OUTPUT FROM CCD
RG TO CCD
HL TO CCD
H7, H8 TO CCD
0.1µF
1.0µF
25V
4.7µF
10V
0.1µF
H5, H6 TO CCD
H3, H4 TO CCD
H1, H2 TO CCD
0.1µF
4.7µF
6.3V
+1.8V SUPPLY
+3V CP OUTPUT
+1.8V CLI SUPPLY
VH SUPPLY
VL SUPPLY
+3V CP OUTPUT
+1.8V CP INPUT
3.3µF
+3V CP OUTPUT
AD9927