FAN7930 Fairchild Semiconductor, FAN7930 Datasheet - Page 14

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FAN7930

Manufacturer Part Number
FAN7930
Description
Critical Conduction Mode PFC Controller
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2010 Fairchild Semiconductor Corporation
FAN7930 • Rev. 1.0.1
6. Soft-Start: When V
reference voltage is increased like a stair step for 5ms.
As a result, V
turn-on time increases smoothly. This reduces voltage
and current stress on the power switch during startup.
7. “Overshoot-less” Startup: Feedback control speed
of PFC is quite slow. Due to the slow response, there is
a gap between output voltage and feedback control.
That is why over-voltage protection (OVP) is critical at
the PFC controller and voltage dip caused by fast load
changes from light to heavy is diminished by a bulk
capacitor. OVP is easily triggered at startup phase.
Operation on and off by OVP at startup may cause
audible noise and can increase voltage stress at startup,
which is normally higher than in normal operation. This
operation is better when soft-start time is very long.
However, too long startup time enlarges the output
250
Figure 34.
μ
Figure 33.
mho
115
COMP
μ
mho
is also raised gradually and MOSFET
Soft-Start Sequence
Gain Characteristic
CC
touches V
START
, internal
14
voltage building time at light load. FAN7930 has
“overshoot-less” control at startup. During startup, the
feedback loop is controlled by an internal proportional
gain controller and when the output voltage reaches the
rated value, it switches to an external compensator after
a transition time of 30ms. In short, an internal
proportional gain controller eliminates overshoot at
startup and an external conventional compensator takes
over successfully afterward.
8. THD Optimization: Total harmonic distortion (THD)
is the factor that dictates how closely input current
shape matches sinusoidal form. The turn-on time of the
PFC controller is almost constant over one AC line
period due to the extremely low feedback control
response. The turn-off time is decided by the current
decrease slope of the boost inductor made by the input
voltage and output voltage. Once inductor current
becomes zero, resonance between C
inductor makes oscillating waveforms at the drain pin
and auxiliary winding. By checking the auxiliary winding
voltage through the ZCD pin, the controller can check
the zero current of boost inductor. At the same time, a
minor delay time is inserted to determine the valley
position of drain voltage. The input and output voltage
difference is at its maximum at the zero cross point of
AC input voltage. The current decrease slope is steep
near the zero cross region and more negative inductor
current flows during a drain voltage valley detection
time. Such a negative inductor current cancels down the
positive current flows and input current becomes zero,
called “zero-cross distortion” in PFC.
Figure 35.
Overshoot-less Startup Control
OSS
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