P60ARM-B/IG/GP1N Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1N Datasheet - Page 98

• Manufacturer Part Number: P60ARM-B/IG/GP1N
• Description: A Low Power, General Purpose 32 Bit RISC Microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
8.6 Test Data Registers
Figure 33: Boundary Scan Block Diagram illustrates the structure of the boundary scan logic.
8.6.1 Bypass Register
Purpose: This is a single bit register which can be selected as the path between TDI and TDO to allow the
device to be bypassed during boundary-scan testing.
Length: 1 bit
Operating Mode: When the BYPASS instruction is the current instruction in the instruction register, serial
data is transferred from TDI to TDO in the SHIFT-DR state with a delay of one TCK cycle.
94
BSINENCELL
BSINCELL
BSOUTNENCELL
nTRST
TMS
TCK
TDI
Figure 33: Boundary Scan Block Diagram
Core Logic
Instruction Decoder
Instruction Register
Device ID Register
Bypass Register
Controller
ARM
TAP
nTDOEN
BSINCELL
BSOUTCELL
BSOUTCELL
TDO
I/O
Cell