P60ARM-B/IG/GP1N Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1N Datasheet - Page 52

• Manufacturer Part Number: P60ARM-B/IG/GP1N
• Description: A Low Power, General Purpose 32 Bit RISC Microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
4.9 Single data swap (SWP)
The instruction is only executed if the condition is true. The various conditions are defined at the beginning
of this chapter. The instruction encoding is shown in Figure 23: Swap Instruction.
The data swap instruction is used to swap a byte or word quantity between a register and external memory.
This instruction is implemented as a memory read followed by a memory write which are ÒlockedÓ
together (the processor cannot be interrupted until both operations have completed, and the memory
manager is warned to treat them as inseparable). This class of instruction is particularly useful for
implementing software semaphores. )
The swap address is determined by the contents of the base register (Rn). The processor first reads the
contents of the swap address. Then it writes the contents of the source register (Rm) to the swap address,
and stores the old memory contents in the destination register (Rd). The same register may be specified as
both the source and destination.
The LOCK output goes HIGH for the duration of the read and write operations to signal to the external
memory manager that they are locked together, and should be allowed to complete without interruption.
This is important in multi-processor systems where the swap instruction is the only indivisible instruction
which may be used to implement semaphores; control of the memory must not be removed from a
processor while it is performing a locked operation.
4.9.1 Bytes and words
This instruction class may be used to swap a byte (B=1) or a word (B=0) between an ARM60 register and
memory. The SWP instruction is implemented as a LDR followed by a STR and the action of these is as
described in the section on single data transfers. In particular, the description of Big and Little Endian
configuration applies to the SWP instruction.
4.9.2 Use of R15
R15 shall not be used as an operand (Rd, Rn or Rs) in a SWP instruction.
48
31
Cond
28
27
00010
23
22 21
B
00
20
Figure 23: Swap Instruction
19
Rn
16
15
Rd
12
11
Source register
Destination register
Base register
Byte/Word bit
Condition field
0000
0 = swap word quantity
1 = swap byte quantity
8
7
1001
4 3
Rm
0